HP8133A Search Results

Contextual Info: SN75LVDS84A FLATLINK TRANSMITTER SLLS354C – MAY 1999 – REVISED NOVEMBER 1999 D D D D D D D D D D D D 21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display

application ds92001

Abstract: DS92001TMA
Contextual Info: DS92001 DS92001 3.3V B/LVDS-BLVDS Buffer Literature Number: SNLS147E DS92001 3.3V B/LVDS-BLVDS Buffer General Description The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across backplanes. One of

IC 74HC14 ST MAKE

Abstract: 11801B IN16P AD8150 OC-24 AD8150-EVAL 149W
Contextual Info: 33 x 17, 1.5 Gbps Digital Crosspoint Switch AD8150 FEATURES FUNCTIONAL BLOCK DIAGRAM INP INN CS RE A 7 5 FIRST RANK 17  7-BIT LATCH SECOND RANK 17  7-BIT LATCH INPUT DECODERS D 33 OUTPUT ADDRESS DECODER 33 17 OUTP 33  17 DIFFERENTIAL SWITCH MATRIX

EXS00A-CG02811

Abstract: rm - 64k DSA00811285.txt capacitor y3p EXS00A-CG
Contextual Info: CDCM6208 www.ti.com SCAS931 – MAY 2012 2:8 CLOCK GENERATOR, JITTER CLEANER WITH FRACTIONAL DIVIDERS Check for Samples: CDCM6208 FEATURES 1 • Superior Performance with Low Power: – Low Noise Synthesizer 265 fs-rms Typical Jitter or Low Noise Jitter Cleaner (1.6 psrms Typical Jitter)

Contextual Info: DS90LV001 www.ti.com SNLS067E – JANUARY 2001 – REVISED APRIL 2013 DS90LV001 800 Mbps LVDS Buffer Check for Samples: DS90LV001 FEATURES DESCRIPTION • • • • • • The DS90LV001 LVDS-LVDS Buffer takes an LVDS input signal and provides an LVDS output signal. In

92001

Contextual Info: DS92001 www.ti.com SNLS147F – JUNE 2002 – REVISED APRIL 2013 DS92001 3.3V B/LVDS-BLVDS Buffer Check for Samples: DS92001 FEATURES DESCRIPTION • • The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across

DS90LV110

Abstract: DS90LV110T DS90LV110TMTC RG-142
Contextual Info: DS90LV110T 1 to 10 LVDS Data/Clock Distributor General Description Features DS90LV110 is a 1 to 10 data/clock distributor utilizing LVDS Low Voltage Differential Signaling technology for low power, high speed operation. Data paths are fully differential

TQFP48

Abstract: TSA0801 TSA1001 TSA1002 TSA1201 TSA1201IF TSA1201IFT marking code c41 SMD ic
Contextual Info: TSA1201 12-BIT, 50MSPS, 150mW A/D CONVERTER • 40mW @5Msps, 150mW @ 50Msps ■ 2.5V supply voltage with 2.5V/3.3V compatibility for digital I/O Input range: 2Vpp differential SFDR up to 77dB @ 50Msps, Fin=15MHz ENOB up to10.5 bits @ 50Msps, Fin=15MHz Built-in reference voltage with external bias

cdv304

Abstract: capacitive coupling ethernet CDC111 CDCV304 CDCVF111 HPA8133A TLK3104SA
Contextual Info: Application Report SCAA049 – November 2001 Using TI’s CDC111/CDCVF111 With TLK3104SA Serial Transceiver for Gigabit Ethernet and Backplane Applications Kal Mustafa High Performance Analog/CDC ABSTRACT This application report discusses jitter transfer of TI’s CDC111/CDCVF111 clock drivers

AD9058

Abstract: AD80013 AD8001 AD8001ACHIPS AD8001AN AD8001AR AD8001R-EB AD8001SMD1 4000 watts power amplifier circuit diagram pcb l
Contextual Info: a 800 MHz, 50 mW Current Feedback Amplifier AD8001 FEATURES Excellent Video Specifications RL = 150 ⍀, G = +2 Gain Flatness 0.1 dB to 100 MHz 0.01% Differential Gain Error 0.025؇ Differential Phase Error Low Power 5.5 mA max Power Supply Current (55 mW)

D1713

Abstract: DS90CF363A HP8665A SN75LVDS82 SN75LVDS84 SN75LVDS84A
Contextual Info: SN75LVDS84A FLATLINK TRANSMITTER SLLS354D – MAY 1999 – REVISED AUGUST 2000 D D D D D D D D D D D D 21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display

Contextual Info: DS92001 3.3V B/LVDS-BLVDS Buffer General Description The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides an BLVDS output signal. In many large systems, signals are distributed across backplanes, and one of the limiting factors for system speed is the "stub length" or

Contextual Info: SN75LVDS84A, SN65LVDS84AQ FLATLINK TRANSMITTER SLLS354E – MAY 1999 – REVISED JANUARY 2001 D D D D D D D D D D D D D 21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display

AD8150

Abstract: OC-24 AD8150-EVAL IN20N
Contextual Info: 33 x 17, 1.5 Gbps Digital Crosspoint Switch AD8150 FEATURES FUNCTIONAL BLOCK DIAGRAM INP INN CS RE A 7 5 FIRST RANK 17 × 7-BIT LATCH SECOND RANK 17 × 7-BIT LATCH INPUT DECODERS D 33 OUTPUT ADDRESS DECODER 33 17 OUTP 33 × 17 DIFFERENTIAL SWITCH MATRIX 17

TSA0801

Abstract: TSA1001 TSA1001CF TSA1001CFT TSA1001IF TSA1001IFT TSA1002 TSA1201
Contextual Info: TSA1001 10-BIT, 25MSPS, 35mW A/D CONVERTER • 10-bit A/D converter in deep submicron ■ ■ ■ ■ ■ ■ ■ ■ CMOS technology Ultra low power consumption: 35mW @ 25Msps 10mW @ 5Msps Single supply voltage: 2.5V Input range: 2Vpp differential 25Msps sampling frequency

Contextual Info: SN75LVDS84A, SN65LVDS84AQ FLATLINK TRANSMITTER SLLS354E – MAY 1999 – REVISED JANUARY 2001 D D D D D D D D D D D D D 21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display

Contextual Info: SN75LVDS84A, SN65LVDS84AQ FLATLINK TRANSMITTER SLLS354E – MAY 1999 – REVISED JANUARY 2001 D D D D D D D D D D D D D 21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display

DS90LV001

Abstract: DS90LV001TLD DS90LV001TM M08A
Contextual Info: DS90LV001 3.3V LVDS-LVDS Buffer General Description The DS90LV001 LVDS-LVDS Buffer takes an LVDS input signal and provides an LVDS output signal. In many large systems, signals are distributed across backplanes, and one of the limiting factors for system speed is the "stub length" or

11801B

Abstract: 840C SD14 signal path designer
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview 2.5GBit/s ParallelĆtoĆSerial MC100SX1481 Converter The MC100SX1481 is a high-speed parallel-to-serial converter which serializes 32-bit data words continuously. The parallel interface provides a 32-bit wide TTL-compatible interface while the serial interface is

Contextual Info: DS92001 www.ti.com SNLS147F – JUNE 2002 – REVISED APRIL 2013 DS92001 3.3V B/LVDS-BLVDS Buffer Check for Samples: DS92001 FEATURES DESCRIPTION • • The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across

FS49

Abstract: MAX5155 transistor SMD MARKING CODE 772
Contextual Info: TSA1201 12-BIT, 50MSPS, 150mW A/D CONVERTER • 40mW @5Msps, 150mW @ 50Msps ■ 2.5V supply voltage with 2.5V/3.3V compatibility for digital I/O Input range: 2Vpp differential SFDR up to 77dB @ 50Msps, Fin=15MHz ENOB up to10.5 bits @ 50Msps, Fin=15MHz Built-in reference voltage with external bias

HP7004A

Abstract: 1417K4A SLLU007A TLK2500 HP83480 BERT 240-1018-1-ND lucent laser 2.5 Gbps
Contextual Info: TLK2500 Serdes EVM Kit Setup and Usage User’s Guide March 2000 Mixed Signal Products SLLU007A IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

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Contextual Info: DS92001 www.ti.com SNLS147F – JUNE 2002 – REVISED APRIL 2013 DS92001 3.3V B/LVDS-BLVDS Buffer Check for Samples: DS92001 FEATURES DESCRIPTION • • The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across

LM337

Abstract: PLCC28 TDA8776A TDA8776AK MLD202 MGD474
Contextual Info: INTEGRATED CIRCUITS DATA SHEET TDA8776A 10-bit, 1000 Msps Digital-to-Analog Converter DAC Product specification Supersedes data of 1995 May 11 File under Integrated Circuits, IC02 1996 Jun 04 Philips Semiconductors Product specification 10-bit, 1000 Msps Digital-to-Analog