HSSI PROTOCOL Search Results

hdlc

Abstract: CRC-32 PM4354 PM7364 PM7367 PM8315
Contextual Info: PMC-Sierra,Inc. PM7367 FREEDM-32P32 Preliminary 32 link, 32 Channel Data Link Manager with PCI Interface FEATURES • Supports a mix of channelized and unchannelized links. • The maximum aggregate clock rate is 64 MHz. When the device is interfaced to two T3 or HSSI links, the maximum

CRC-32

Abstract: PM8315 hdlc PM4354 PM7364 PM7367
Contextual Info: PM7367 FREEDM-32P32 PMC-Sierra,Inc. 32 link, 32 Channel Data Link Manager with PCI Interface FEATURES • Supports a mix of channelized and unchannelized links. • The maximum aggregate clock rate is 64 MHz. When the device is interfaced to two T3 or HSSI links, the maximum

B-STDX 9000

Abstract: B-STDX 8000 ANSI T1.102 GR-63-CORE lucent dacs bottle feeder GR-1089-CORE RJ-48 multiplexing t1 frame to t3 frame TR-NWT-000499
Contextual Info: B-STDX 8000/9000 Multiservice WAN Switches High-Speed Frame Relay/IP Modules • 1-Port Channelized DS3/1/0 I/O Module ■ 1-Port Channelized DS3/1 I/O Module ■ 2-Port HSSI I/O Module ■ 2-Port Ethernet 10/100 Base-T I/O Module The B-STDX 8000/9000TM high-speed frame relay/IP I/O modules provide IP and

altera ethernet packet generator

Abstract: verification for pci express xaui xaui xgmii ip core altera transactor hssi protocol
Contextual Info: DesignCon 2007 Serial Protocol Compliance of an FPGA-Integrated Mixed-Signal Transceiver Divya Vijayaraghavan, Altera Corporation Ramanand Venkata, Arch Zaliznyak, Michael Zheng, Steven Shen, Binh Ton, Lana Chan, Steve Park, Chong Lee, Rakesh Patel, Richard Cliff,

infiniband Physical Medium Attachment

Abstract: "toan nguyen" 200MHZ P802 circuit diagram digital clocks Serial RapidIO Infiniband FPGA SoC, Chip, telecom fpga da altera altera 48 fpga 1gbps serdes
Contextual Info: Architecture and Methodology of a SoPC with 3.25Gbps CDR based Serdes and 1Gbps Dynamic Phase Alignment Ramanand Venkata, Wilson Wong, Tina Tran, Vinson Chan, Tim Hoang, Henry Lui, Binh Ton, Sergey Shumurayev, Chong Lee, Shoujun Wang, Huy Ngo, Malik Kabani, Victor Maruri, Tin Lai, Tam Nguyen, Arch

PRBS altera verilog

Abstract: mixed signal fpga datasheet papers ethernet mac verilog testbench altera ethernet packet generator SerialLite verification for pci express
Contextual Info: DesignCon 2006 Functional Verification of 622-Mbps–6.375-Gbps Transceiver IP in an FPGA Ning Xue, Altera Corporation [nxue@altera.com] Ramanand Venkata, Arch Zaliznyak, Divya Vijayaraghavan, Steve Park, Chong Lee, Rakesh Patel (Altera Corporation) CP-TRNSCVR-1.0

Kentrox

Abstract: 10311 7930 EN50082-1 RJ48C VT100 EIA-613
Contextual Info: ATM Access Family A complete line of multi-service access systems for today’s hybrid networks. ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ n Standards compliance with ATM Forum, Bellcore, ITU-T, and Frame Relay Forum

Contextual Info: AMT75e DVB-S/S2 High Speed Broadcast Modem Features •            Overview Combines Advantech Wireless’ powerful DVB-S/S2 modulator and demodulator in a single 1 RU chassis. Powerful Forward Error Correction FEC choices compliant

txc-03361 application notes

Abstract: 97029 MVIP-90 PM4351 PM6344 PM7366 PM8313 application notes txc-03361 e1 E2 e3 liu transceiver
Contextual Info: PM7366 FREEDM-8 APPLICATION NOTE PMC-971178 ISSUE 1 FRAME ENGINE AND DATA LINK MANAGER PM7366 FREEDM-8 ANSWERS TO FREQUENTLY ASKED QUESTIONS REGARDING THE FREEDM-8 ISSUE 1 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

serial number of internet manager

Abstract: PMC-970931 PM6344 PM7366 CRC-32 PM4314 PM4388 PM4314QDSX
Contextual Info: PM7366 FREEDM-8 APPLICATION NOTE PMC-970931 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER TECHNICAL OVERVIEW ISSUE 2: SEPTEMBER 1997 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000

Contextual Info: PMC-Sierra, Inc. FREEDM Technical Overview PMC-970540 ISSUE 1 Frame Engine and Data Link Manager FREEDM TM FREEDM Frame Engine and Data Link Manager Technical Overview Issue 1: June 1997 i PMC-Sierra, Inc. FREEDM Technical Overview PMC-970540 ISSUE 1 Frame Engine and Data Link Manager

IESS 310

Abstract: IESS-309 MIL-STD-188-165 IESS-308 standard
Contextual Info: AMT 73L Modem Series DISA CERTIFIED Features •            MIL-STD-188-165A CERTIFIED Data Rates 64kbps – 52Mbps in 1bps steps Optional eTPC Rates from 0.5 to 0.92 eTPC Extends data rate to 110Mbps BPSK, QPSK, OQPSK, 8PSK & 16QAM

CRC-32

Abstract: PM7364
Contextual Info: PM7364 FREEDM-32 APPLICATION NOTE PMC-970932 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PM7364 FREEDM-32 FRAME ENGINE AND DATA LINK MANAGER TECHNICAL OVERVIEW ISSUE 2: SEPTEMBER 1997 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000

JESD204B

Contextual Info: JEDEC JESD204B An early look at the third-generation high speed serial interface for data converters Rev. 1 — 19 August 2011 White paper Document information Info Content Author s Maury Wood – NXP Semiconductors, JEDEC JESD204B task group Chairman, Caen, France; Luc Giovacchini – NXP Semiconductors, Caen,

infineon SAB 82532

Abstract: DSCC4
Contextual Info: P R O D U C T B R I E F Multiprotocol DMA supported Serial Communication Controller with 4 Channels The DSCC4 PEB 20534 is a multiprotocol data communication controller with four symmetrical serial channels. The DSCC4 is offering two high speed channels. Data rates up to 52 Mbit/s are

CAB-SS-V35MT

Abstract: CAB-SS-530MT CAB-SS-X21MT CAB-SS-V35FC CAB-SS-530AMT cab-ss-232mt cisco 2901 CAB-SS-232FC NM-8A cab-ss-449fc
Contextual Info: Data Sheet Serial Connectivity Network Modules for the 2600, 3600, and 3700 Series NM-1HSSI, NM-4T, NM-4A/S, NM-8A/S, NM-16A/S, NM-16A, NM-32A The Cisco 2600, 3600, and 3700 Series offer a wide variety of serial connectivity modules to accommodate the range of application needs in customer networks. The

siemens family 80

Abstract: siemens sab 82532 siemens sab 82538 SIEMENS ESCC8
Contextual Info: s Product Brief DSCC4 PEB 20534 Multiprotocol DMA supported Serial Communication Controller with 4 Channels The DSCC4 PEB 20534 is a multiprotocol data communication controller with four symmetrical serial channels. The DSCC4 is offering two high speed channels.

JT-Q703

Abstract: mindspeed pbga 23mm hdlc M28480 Q781
Contextual Info: > Product Overview Multi-Channel HDLC controller with enhanced SS7 support The M28480 is the next generation advanced multi-channel synchronous communications controller MUSYCC that formats and de-formats 512 bi-directional high-level datalink control (HDLC) channels. MUSYCC-512 operates at Layer

Contextual Info: PM PM7366 FREEDM-8 PMC-Sierra,Inc. Frame Engine and Datalink Manager FEATURES High density HDLC controller ideal for Internet access, Frame Relay, and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s. Supports eight full-duplex and independently-timed links.

CRC-32

Abstract: PM7364 PM7366 4388
Contextual Info: TM PM7364 FREEDM Preliminary Information 32 FRAME ENGINE AND DATA LINK MANAGER FEATURES • High density HDLC controller ideal for Internet access, Frame Relay and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s. • Supports 32 full-duplex and

Contextual Info: PM7366 PMC-Sierra, Inc. Preliminary Information FEATURES High density HDLC controller ideal for The maximum aggregate clock rate is Supports scatter-gather capabilities Internet access, Frame Relay and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s.

hdlc

Abstract: CRC-32 PM4314 PM4388 PM6388 PM7346 PM7364 PM7366 quad channel relay board
Contextual Info: PM7366 FREEDM-8 PMC-Sierra,Inc. Frame Engine and Datalink Manager FEATURES • High density HDLC controller ideal for Internet access, Frame Relay, and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s. • Supports eight full-duplex and

Contextual Info: PMC-Sierra, Inc. PM7364 F r e e d m Preliminary Information 32 • F R A M E E N G IN E A N D DATA LIN K M A N A G E FEATURES High density HDLC controller ideal for Internet access, Frame Relay and DSLAM equipm ent supporting rates ranging from 56 Kbit/s to 52 Mbit/s.

24 port liu

Abstract: hdlc CRC-32 PM4314 PM4388 PM6388 PM7364 PM7366 PM8313 quad channel relay board
Contextual Info: PM7364 FREEDM-32 PMC-Sierra,Inc. Frame Engine and Datalink Manager FEATURES • High density HDLC controller ideal for Internet access, Frame Relay, and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s. • Supports 32 full-duplex and independently-timed links.