HY512264 TC Search Results

HY512264

Abstract: HY512264JC HY512264TC HY512264 tc
Contextual Info: »HYUNDAI HY512264 Series 128Kx 16-bit CMOS DRAM with 2CAS, Extended Data Out PRELIMINARY DESCRIPTION The H Y 512264 is the new generation and fast dynamic RAM organized 131,072 x 16-bit configuration employing advanced submicron CMOS process technology and advanced circuit design technique to achieve fast access

hy512264

Abstract: HY512264JC HY512264TC
Contextual Info: HY512264 128Kx16, Extended Data Out mode DESCRIPTION This family is a 4M bit dynamic RAM organized 131,072 x 16-bit configuration with CMOS DRAMs. The circuit and process design allow this device to achieve high performance and low power dissipation. In dependant read and write of upper and

HY512264

Abstract: HY512264TC
Contextual Info: “H Y U N D A I HY512264 Series _128K x 16-bit CMOS DRAM with 2/CAS, Extended Data Out PRELIMINARY DESCRIPTION ORDERING INFORMATION The H Y 5 12264 Series is a high perform ance CM O S fast dynam ic RAM organized 131,072x16 -b it config-uration. Independent read and w rite o f upper and

HY512264

Abstract: HY512264jc
Contextual Info: “H YU N D A I H Y 5 1 2 2 6 4 S e r ie s 128Kx 16-bit CMOS DRAM with 2CAS, Extended Data Out PRELIMINARY DESCRIPTION The HY512264 is the new generation and fast dynamic RAM organized 131,072 x 16-bit configuration employing advanced submicron CMOS process technology and advanced circuit design technique to achieve fast access

HY512264TC

Contextual Info: H Y U N D A I -« HY512264 > 128Kx16, Extended Data Out mode DESCRIPTION This family is a 4M bit dynamic RAM organized 131,072 x 16-bit configuration with CMOS DRAMs. The circuit and process design allow this device to achieve high performance and low power dissipation. In dependant read and write of upper and

Contextual Info: •HYUNDAI H Y 5 1 2 2 6 4 128Kx16, Extended Data Out mode DESCRIPTION This family is a 4M bit dynamic RAM organized 131,072 x 16-bit configuration with CMOS DRAMs. The circuit and process design allow this device to achieve high performance and low power dissipation. In dependant read and write of upper and

HY512264

Contextual Info: •HYUNDAI H Y 5 1 2 2 6 4 128Kx16, E xten ded Data O ut m ode DESCRIPTION T his fam ily is a 4M bit d yn am ic RAM o rg an ized 131,072 x 16-bit con figu ration w ith C M O S DR AM s. T he circu it and process de sig n allow this d e vice to achieve high p e rfo rm an ce and low po w e r dissipa tion . In de pe n d a n t read and w rite of up p e r and

hy512264

Abstract: hy512260 8 bit dRAM Controller
Contextual Info: HY512260 128Kx16, CMOS DRAM with /2CAS DESCRIPTION This family is a 2M bit dynamic RAM organized 131,072 x 16-bit configuration with CMOS DRAMs. The circuit and process design allow this device to achieve high performance and low power dissipation. Independent read and write of upper and

marking q815

Contextual Info: H Y U N D A I - « H Y 512260 128Kx16. CMOS DRAM wlth/2CAS DESCRIPTION This family is a 2M bit dynamic RAM organized 131,072 x 16-bit configuration with CMOS DRAMs. The circuit and process design allow this device to achieve high performance and low power dissipation. Independent read and write of upper and

IBM025161LG5D60

Abstract: gm72v16821 MD908 KM48S2020 TC59R1809 GM72V1682 KM4232W259Q60 KM416S1120A IBM025171LG5D-70 KM44S4020AT
Contextual Info: Fujitsu Microelectronics Inc. Hitachi America Ltd. Hyundai Electronics America Inc. IBM Microelectronics LG Semicon America Inc. formerly Goldstar Mitsubishi Electronics America Inc. NEC Electronics Inc. Micron Technology Inc. Mosel Vitelic Inc. MoSys Inc.