T80023
Abstract: No abstract text available
Text: jl L PRO D UCT NO. 95547- 41.91±0.1 i'} - i a — ^>1 VS/777777;J//J77/7JS7/?7//77777Tr/77/i7777T7% A B O V E P .C .B . RIG H T P U S H ROD TT 5 111 IHI- DIM.S HE- B E L O W P .C .B . L E F T P U S H ROD mot’ l code rev. A 8 C toterance unless otherwise specified
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95547NO.
VS/777777
J//J77/7JS7/
7//77777Tr/77/i7777T7%
T50QG2
T50098
T5Q216
T80023
/27/a*
27/gf
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tmp90c84
Abstract: No abstract text available
Text: TOSHIBA TMP90PH48 CMOS 8-BIT MICROCONTROLLERS TMP90PH48F 1. OUTLINE AND CHARACTERISTICS The TMP90PH48 is a system evalution LSI having a built in One-Time PROM for TMP90C848. A programming and verification for the internal PROM is achieved by using a general EPROM programmer with an adapter socket.
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TMP90PH48F
TMP90PH48
TMP90PH48
TMP90C848.
TMP90C848
04000H
tmp90c84
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Untitled
Abstract: No abstract text available
Text: 16Mbit Synchronous DRAM Series ♦HYUNDAI HY57V164010- 4Mx4bit Synchronous DRAM HY57V168010- 2Mx8blt Synchronous DRAM HY57V161610- 1Mx16bit Synchronous DRAM DESCRIPTION The HY57V164010, HY57V168010, HY57V161610 Programmable options include the length of are high speed 3.3 Volt synchronous dynamic RAMs
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16Mbit
HY57V164010-
HY57V168010-
HY57V161610-
1Mx16bit
HY57V164010,
HY57V168010,
HY57V161610
512Kbit
1SD10-Q3-NOV96
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Untitled
Abstract: No abstract text available
Text: HIIICRTRLYST Umili S E M I C O N D U C T O R CAT64LC10/20/40 1K/2K/4K-Bit Serial E2PROM FEATURES • SPI Bus Compatible Commercial and Industrial Temperature Ranges ■ Low Power CMOS Technology Power-Up Inadvertant W rite Protection ■ 2.5V to 6.0V Operation
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CAT64LC10/20/40
CAT64LC10/20/40
64LC10SI-2
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Untitled
Abstract: No abstract text available
Text: HM6216255HI Series 4M high Speed SRAM 256-kword x 16-bit HITACHI ADE-203-1037A (Z) Rev. 1.0 Apr. 15, 1999 Description The HM6216255HI Series is a 4-M bit high speed static RAM organized 256-k word x 16-bit. It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high
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HM6216255HI
256-kword
16-bit)
ADE-203-1037A
256-k
16-bit.
400-mil
44-pin
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sine wave generation using pcm codec 1110 with ds
Abstract: 04728
Text: • DESCRIPTION The FUJITSU MB86434 is an AIU audio interface unit LSI for +5 V single-power source digital telephone devices, manufactured using CMOS process technology. The codec transmission filter characteristics meet G.712 standards, and can handle input and output in A-Law, |A-Law and linear conversion modes. The MB86434 also contains the
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MB86434
F9803
sine wave generation using pcm codec 1110 with ds
04728
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UPD42S18160G5-70-7-JF
Abstract: UPD42S18160G5707JF uPD42S18160-50 UPD4216160G uPD42S18160G5-50-7JF UPD4216160G5-50 PD42S18160-60 UPD42S18160G5-60-7JF NEC 4216160 UPD4218160G5-80-7JF
Text: DATA SHEET / MOS INTEGRATED CIRCUIT / PD42S16160,4216160,42S18160,4218160 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE D e s c rip tio n The /xPD42S16160, 4216160, 42S18160, 4218160 are 1,048, 576 words by 16 bits CMOS dynamic RAMs. The
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uPD42S16160
uPD4216160
uPD42S18160
uPD4218160
16-BIT,
/xPD42S16160,
42S18160,
PD42S16160,
42S18160
50-pin
UPD42S18160G5-70-7-JF
UPD42S18160G5707JF
uPD42S18160-50
UPD4216160G
uPD42S18160G5-50-7JF
UPD4216160G5-50
PD42S18160-60
UPD42S18160G5-60-7JF
NEC 4216160
UPD4218160G5-80-7JF
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Untitled
Abstract: No abstract text available
Text: DATA SHEET E.S.D NOISE CLIPPING DIODES NNCD3.3E to NNCD12E ELECTROSTATIC DISCHARGE NOISE CLIPPING DIODES 200 mW TYPE PACKAGE DIMENSIONS This product series is a diode developed for E.S.D (Electrostatic Discharge) noise protection. Based on the IEC1000-4-2 test on
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NNCD12E
IEC1000-4-2
NNCD12E
IEC1000-42)
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Untitled
Abstract: No abstract text available
Text: Philips Semiconductors Product specification TrenchMOS transistor Logic level FET GENERAL DESCRIPTION PINNING - SOT404 QUICK REFERENCE DATA SYMBOL PARAMETER w o > N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface
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OT404
BUK9656-30
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R7F7
Abstract: No abstract text available
Text: Preliminary H M 5216165 S e r ie s 524,2SS-word x 16-blt x 2-bank Syn ch ro n o u s D ynam ic R A M HITACHI All inpuls and outputs are referred to the rising e d g e o f th e c lo c k in p u t. T h e H M 5 2 1 6 1 6 5 is offered in 2 banks for improved performance.
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16-blt
HM5216165TT-10
HM5216165TT-12
HM5216165TT-15
400-mil
50-pin
TTP-50D)
HM5216165
073-Vm
R7F7
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Untitled
Abstract: No abstract text available
Text: M OSEL VITELIC V54C316802VA HIGH PERFORMANCE 3.3 VOLT2M X 8 SYNCHRONOUS DRAM 2 BANKS X 1MBit X 8 CAS Latency = 3 PRELIMINARY 8 10 12 System Frequency fCK 125 MHz 100 MHz 83 MHz Clock Cycle Tim e (tcK 3 ) 8 ns 10 ns 12 ns Clock Access Tim e (tAC3) 7 ns 8 ns
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V54C316802VA
V54C316802VA
44-Pin
L0-15
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rca thyristor manual
Abstract: HN623258 101490
Text: Quick Reference Guide to Hitachi 1C Memories Package Information Reliability of Hitachi 1C Memories Applications MOS Static RAM MOS Pseudo Static RAM Application Specific Memory MOS Dynamic RAM MOS Dynamic RAM Module MOS Mask ROM MOS PROM ECL RAM P> Jc^< j
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R40 AH
Abstract: No abstract text available
Text: HM5283206 Series 131,072-word x 32-bit x 2-bank Synchronous Graphic RAM HITACHI ADE-203-223A Z Rev. 1.0 May. 30, 1996 Description All inputs and outputs signals refers to the rising edge of the clock input. The HM5283206 provides 2 banks to realize better performance. 8 column block write function and write per bit function are
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HM5283206
072-word
32-bit
ADE-203-223A
Hz/83
Hz/66
z//77////////a
QQ27flfl2
R40 AH
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UPD4216805L
Abstract: No abstract text available
Text: NEC MOS INTEGRATED CIRCUIT j u P D 42S 16805L , 4 2 1 6 8 0 5 L 3.3 V OPERATION 16 M BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, HYPER PAGE MODE D escription The //PD42S16805L, 4216805L are 2 097 152 words by 8 bits dynamic CMOS RAMs w ith optional hyper page mode.
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uPD42S16805L
uPD4216805L
PD42S16805L,
4216805L
28-pin
//PD42S16805L-A60,
4216805L-A60
PD42S16805L-A70,
4216805L-A70
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ES-45714-001
Abstract: VERTICAL IC LA 7840 714-3004 ic la 7840
Text: no te 1 . ; HOUSING M ATL: LCP, U L94V - 0, COLOR B LA C K T E R M IN A L M ATL: CO PPER A L L O Y FINISH: S E L E C T GOLD: 30 N.I. NIN IN CO N TACT A R E A S E L E C T TIN: 150 N.I. NIN IN S O LD E R A R E A O V E R A L L NICKEL U N D E R P L A T E . PRO DUCT SPECIRICATION:
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PS-45719-001.
ES-45714-001.
PS-45719-001
SD-457K-001_
ES-45714-001
VERTICAL IC LA 7840
714-3004
ic la 7840
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sm 0038 PIN DIAGRAM
Abstract: SMH63VN392M22X40T2 SMH450
Text: SMH Series a Snap Mount • Large Capacitance ■ High CV ■ High Ripple ■ +85°C Maximum Temperature The SMH series capacitors are the standard 85°C, large capacitance, snap-in capacitors from United Chem-Con. The load life for the SMH series is 2,000 hours at 85°C with the rated ripple current
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SMH16VN223M30X30
SMH63VN103M35X40
120Hz)
SMH200VN471M25X30
SMH400VN221M30X35
sm 0038 PIN DIAGRAM
SMH63VN392M22X40T2
SMH450
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FT-707
Abstract: No abstract text available
Text: TO SHIBA TENTATIVE TC 59S6417/09/05B FT-70.-75.-80 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 1 ,0 4 8 ,5 7 6 -W O R D S X 4 B A N K S X 16-BITS S YN C H R O N O U S D Y N A M IC RAM 2 ,0 9 7 ,1 5 2 -W O R D S X 4 B A N K S X 8-BITS S Y N C H R O N O U S D Y N A M IC R AM
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59S6417/09/05B
FT-70
16-BITS
TC59S6417BFT
576words
TC59S6409BFT
TC59S6405BFT
6417/09/05B
62MAX
FT-707
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3240B
Abstract: No abstract text available
Text: HM5241605C Series 131,072-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-381B Z Rev. 2.0 Jan. 7, 1997 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5241605C is offered in 2 banks for improved performance.
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HM5241605C
072-word
16-bit
ADE-203-381B
Hz/57
44Rb203
3240B
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Untitled
Abstract: No abstract text available
Text: HB526C164EN Series 524,288-word x 64-bit x 2-bank Synchronous Dynamic RAM Module HITACHI ADE-203-628A Z Rev. 1.0 Feb. 7, 1997 Description The HB526C164EN belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been developed as an optimized main memory solution for 8-byte processor applications. The HB526C164EN is a 5 12k X 64
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HB526C164EN
288-word
64-bit
ADE-203-628A
16-Mbit
HM5216165TT)
24C02)
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uPD4265160
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT ¿¿PD4264160, 4265160 64 M-BIT DYNAMIC RAM 4 M-WORD BY 16-BIT, FAST PAGE MODE D escrip tio n The /iPD4264160,4265160 are 4,194,304 words by 16 bits dynamic CMOS RAMs. The fast page mode capability realize high speed access and low power consumption.
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uPD4264160
uPD4265160
16-BIT,
/iPD4264160
50-pin
/iPD4264160-A50
PD4265160-A50
/xPD4264160-A60
/jPD4265160-A60
juPD4264160-A70
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Untitled
Abstract: No abstract text available
Text: ADE-203-186A Z i HM5241605 Series 131,072-word x 16-bit x 2-bank Synchronous Dynamic RAM H IT A C H I All inputs and outputs are referred to the rising edge of the clock input. The HMS241605 is offered in 2 banks for improved performance. 3.3 V Power supply
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ADE-203-186A
HM5241605
072-word
16-bit
HMS241605
Hz/57
Hz/50
4inb203
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W777777
Abstract: No abstract text available
Text: JUN 1 2 1992 Ijr‘ VITEUC V52C8128 MULTIPORT VIDEO RAM WITH 128KX8 DRAM AND 256 X 8 SAM HIGH PERFORMANCE V52C8128 80 10 Max. RAS Access Time, tRAc 80 ns 100 ns Max. CAS Access Time, (tcAc) 25 ns 25 ns Max. Column Address Access Time, (t^ ) 45 ns 50 ns Min. Fast Page Mode Cycle Time, (tpc)
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V52C8128
128KX8
W777777
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Untitled
Abstract: No abstract text available
Text: M OSEL VITELIC V54C365164VB HIGH PERFORMANCE 143/133/125 MHz 3.3 V 0 L T 4 M X 16 SYNCHRONOUS DRAM 4 BANKS X 1Mbit X 16 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143 MHz 133 MHz 125 MHz 125 MHz Clock Cycle Tim e (tcK 3 ) 7 ns 7.5 ns 8 ns 8 ns Clock Access Tim e (tAC3) CAS Latency = 3
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V54C365164VB
54-Pin
V54C365164VB
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5380A
Abstract: No abstract text available
Text: L5380/L53C80 CMOS SCSI Bus Controller FEATURES DESCRIPTION □ Asynchronous Transfer Rrate U p to 4 M bytes/sec □ R n and Functionally Com patible w ith NCR5380, but 2.5x Faster □ Low Pow er C M O S Technology □ On-Chip SC SI Bus D rivers □ Supports A rbitration, Selection/
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NCR5380,
40/48-pin
44-pin
L5380/L53C80
L5380/L53C80
L53C80PC4
5380A
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