IC 5101 RAM Search Results

5101 RAM

Abstract: Intel 4289 CD4011AE Intel mcs-40 intel 4002 intel 2101 Static RAM MCS 4040 ttl 7404 draw pin configuration of ic 7404 4011AE
Contextual Info: irrte1 « In te l C o rp o ra tio n 1975 APPLICATION NOTE AP-12 Contents Designing Non-Volatile Memory Systems with Inters 5101 RAM IN T R O D U C T IO N . 1 D E V IC E D E S C R IP T IO N .

cq 636 g diode

Abstract: tdk core lN4148 2N3904 ND T80-26 DIODE LN4148
Contextual Info: m C S - - 5 1 1 Secondary Side Post Regulator SSPR for Switching Power Supplies with Multiple Outputs This application note describes the common post regulation methods used in power supply design and introduces the CS-5101 Secondary Side Post Regulator Control IC. It also shoivs a detailed design example of a dual output, current mode control, forward

S3 TRIO 64

Contextual Info: UNITED MICROELECTRONICS Ì 2 D Ë | TBSSôia 0Q004SS 3 9325812 U N IT E D M IC R O E L E C T R O N IC S 92D 00455 D J l7 7 -/3 U M 5101 rr.T .n Voice Recording and r ” " i Reproducing CTJ- Features • DRAM is used as a voice data memory. ■ The RC oscillator makes sample rate changing fea%

ic 5101 ram

Abstract: TRANSISTOR 5101 pb S6NA
Contextual Info: Secondary Side Post Regulator for AC/DC and DC/DC Multiple Output Converters D escription T he CS-5101 is a b ip o la r m o n o lith ic se c o n d a ry sid e p o st re g u la to r SSPR w h ic h p ro v id e s tig h t re g u la ­ tion o f m u ltip le o u tp u t v o ltag es in

5101 RAM

Abstract: intel 2101 Static RAM
Contextual Info: intei P/N Typ. Current @ 2V Typ. Current @ 5V PA (HA) 5101L 5101L-1 5101L-3 0.14 0.14 0.70 • Single +5V Power Supply ■ Ideal for Battery Operation (5101L) 0.2 0.2 1.0 RAM 5101 FAMILY x 256 x 4 BIT STATIQXMOSjRAM Max Access (ns) 650 450 650 ■ Directly TTL Compatible:

5101ab

Abstract: ic 5101 ram 5101 cmos ram L21S
Contextual Info: in t e i M5101-4, M5101L-4 256 x 4 BIT STATIC CMOS RAM Single +5V Power Supply Military Temperature Range: -55° C to +125° C Ultra Low Standby Current: 200nA/Bit C E 2 Controls Unconditional Standby Mode Fast Access Time — 800ns Three-State Output T h e Intel M 5101 is an u ltra -lo w p o w er 2 5 6 X 4 C M O S R A M sp e cifie d over th e - 5 5 ° C to + 1 2 5 °C tem p e ra tu re range. T h e R A M

5101 sram

Abstract: HM435101 ic 5101 ram HM435101 sram CM5101 HM43 3D03 SO65 MCM5101-65
Contextual Info: MOTOROLA MCM5101 MCM51LOI 256 x 4 BIT STATIC RAM CMOS The M CM 5101 fa m ily o f C M O S R A M s o ffe rs ultra lo w p o w e r and fu l­ ly sta tic ope ration w ith a single 5-v o lt supp ly. T he C M O S 1024-bit devices are organized in 256 w o rd s by 4 bits. Separate data in p u ts and

5101 RAM

Abstract: M5101-4 M5101 ram 5101 M5101L-4 5101 intel
Contextual Info: intei M 5101-4, M 5101L-4 2 5 6 x 4 BIT S TA TIC CMOS RAM Single +5V Power Supply Military Temperature Range: -55° C to +125° C Ultra Low Standby Current: 200nA/Bit CE 2 Controls Unconditional Standby Mode Fast Access Time — 800ns Three-State Output Th e In te l M 5101 is an u ltra -lo w p o w e r 2 5 6 X 4 CM OS R A M sp ecifie d over th e - 5 5 ° C to + 1 2 5 ° C te m p e ra tu re range. Th e R A M

5101 RAM

Abstract: ram 5101 intel 5101 intel 2101 5101L ram 5101L-1 intel 2101 Static RAM 5101L-3 5101 intel 5101L
Contextual Info: intei 5101 FAMILY ^ 256 x 4 BIT STATIQX M O S jR A M P/N Typ. Current @ 2V Typ. Current @ 5V PA (HA) Max Access (ns) 0.14 0.2 0.2 1.0 650 450 650 5101L 5101L-1 5101L-3 0.14 0.70 •Single +5V Power Supply ■ Ideal for Battery Operation (5101L) ■ Directly TTL Compatible:

ic 5101 ram

Abstract: 5101 RAM LH5101 LH5101-30 5101 cmos ram intel 5101 1K x 8 static ram 5101 static ram
Contextual Info: LH5101 CMOS 1K 256 4 Static RAM x FEATURES DESCRIPTION • 256 • Access time: 300 ns (MAX.) The LH5101 is a static RAM organized as 256 x 4 bits. It is fabricated using silicon-gate CMOS process technology. • Low-power consumption: Standby: 10 (.tA x

Contextual Info: In t e l M5101-4, M5101L-4 256 X 4 BIT STATIC CMOS RAM • Military Temperature Range: -5 5 °C to +125°C Single +5V Power Supply ■ Ultra Low Standby Current: 200nA/Bit CE 2 Controls Unconditional Standby Mode ■ Fast Access Time — 800ns Three-State Output

ic 5101 ram

Contextual Info: & HARRIS H 4 _5 1 0 1 / 5 1 1 1 Low N oise, High Perform ance O perational Am plifiers August 1991 Featu res A p p lica tio n s • L o w Noise . 3.3nV/v/Hzat 1kHz • High Quality Audio Preamplifiers • W ide Bandwidth . 10MHz Com pensated

5101 RAM

Abstract: static 5101 M5101 M5101-4 M5101L-4 5101 cmos ram
Contextual Info: in te i M 5101-4, M 5101L-4 256 X 4 BIT S TA TIC CMOS RAM • M ilitary Temperature Range: -55° C to +125° C Single + 5 V Power Supply ■ Ultra Low Standby Current: 200nA /B it C E 2 Controls Unconditional Standby Mode ■ Fast Access Time — 800ns Three-State Output

UM5101

Abstract: ums 3691
Contextual Info: □ M C UM5101 WÊÊÊÊÊÊÊÊtÊÊÊBHBÊÊnÊÊÊÊÊÊÊÊSÊÊÊÊÊÊÊÊÊÊÊÊÊÊ Voice Recorder and Reproducer Features • ■ It can be co nnected to one o r tw o D R A M and used to ■ store v o ice data. ■ The B it rates can be selected

Intel mcs-40

Abstract: intel 1101 2116 ram 5101 RAM transistor equivalenti Bipolar PROM programming Creative IC CT 1975 intel 3601 1702a eprom MCS-40
Contextual Info: PRIC E 15 00 memory design handbook m in ia i O k p a r » lio n 1 0 7 7 INTRODUCTION The Intel Memory Design Handbook contains information on the use of Intel’s memory components and support circuits in system application. It is intended to aid the system designer to gain a thorough

Contextual Info: 1-chip MICROCOMPUTER FOR TELEPHONE SET S-7292AF The S-7292AF is a CM OS 4-bit microcomputer for telephone sets, which integrates ROM, RAM, dialer circuit on one chip. timers, a serial I/O, I/O ports and a It features low voltage operation and low current consumption.

hy 214

Abstract: ay 9j 5T01
Contextual Info: HA-5101/883 HARRIS Low Noise, High Performance Operational Amplifier J a n u a ry 1 9 8 9 D e s c rip tio n F e a tu re s • The H A -5 1 0 1 /8 8 3 is a d ie le c tric a lly isola te d o perational a m p lifie r fe a tu ring lo w n o is e and hig h perfo rm a n ce . This

N5101

Abstract: n5100 ASJ3 5100H
Contextual Info: MN5100 MN5101 i —m M IC R O HIGH-SPEED 8-Bit AID CONVERTERS N E T W O R K S DESCRIPTION • H igh C on versio n S peed 90 0 n s e c MN5101 1.5 iSec MN5100 • S m all 24-P in D IP • + 1 /2 L S B L in ea rity and N o M issing C od es O ve r Tem p eratu re

HM435101

Abstract: MCM5101 intel 5101 MCM51L01C45 S5101 HM43 HM6501 MCM5101C65 MCM5101C80 MCM51L01
Contextual Info: 8 < > MOTOROLA MCM5101 MCM51L01 256x4 BIT STATIC RAM CMOS The MCM5101 fam ily o f CMOS RAMs offers ultra low power and ful­ ly static operation w ith a single 5-volt supply. The CMOS 1024-bit devices are organized in 256 words by 4 bits. Separate data inputs and

T75A

Contextual Info: Real time clock module 3-blt REALTiM EaOCKM ODULE RTC-64611/64613 • • • • • Builtin crystal unit allows adjustm ent-free efficient operation. 8-bit data bus and high speed access 85 nsec. max. . Provided with the sam e interface as S-RAM and battery backup function.

Contextual Info: AT29C4096 Features • • • • • • • • • • Note: See AT49F4096 For New Designs Fast Read Access Time - 90 ns Five-Volt-Only Reprogramming Sector Program Operation Single Cycle Reprogram Erase and Program Internal Address and Data Latches

HM435101

Abstract: L0145 D11-CR HM43 MCM5101 ram 5101 s5101* ami D11/CR HM6501 MCM5101C65
Contextual Info: r> • r . @ M O T O R O L A \ > >.\ 0 u MCM5101 MCM51L01 2 5 6 x4 BIT STATIC RAM CMOS T h e M C M 5 1 0 1 fa m ily o f C M O S R A M s o ffe r s u ltra lo w p o w e r a n d f u l­ ly s ta tic o p e ra tio n w it h a s in g le 5 -v o lt s u p p ly . T h e C M O S 1 0 2 4 -b it

Contextual Info: ill# ICW 0RKS W42S51-01 3 DIMM Desktop System Clock Features • Maximized EMI suppression using IC W O R K S ’ Spread Spectrum Technology • Generates system clocks for 2.5/3.3V based designs: - 4 CPU clocks with 2.5V output swing • Separate supply pins for CPU and IOAPIC output buffers:

OPTOCOUPLER 5V

Abstract: ph7d diode ITT 7HO Diode SV-02 LMS100 LHB1 X 25 UMI 2.5A 150 200W-500W LM5020 LM5069
Contextual Info: is a ia | tfê J M 2 0 0 6 0 4 n z . .1 n s . 5L#<$ n ia u - a s * ll# . 2 - 3 * l|g 5 ^ |E fO |E . 4 . 7 ^ ^ S :-§ -« H 4 . S-E\o\ q ^ o j . 8 o > ^ S 5L%\<# A c l $ 1 ^ 4 l ^ § * 1 3 - ^ € 3 1 ^ 3 M ^ ^ ^ ] i r