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    IMS T800 Search Results

    IMS T800 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    1008CT-800XGBC Coilcraft Inc General Purpose Inductor, 0.08uH, 2%, 1 Element, Ceramic-Core, SMD, 1008, CHIP, 1008, ROHS COMPLIANT Visit Coilcraft Inc Buy
    1008CT-800XGBB Coilcraft Inc General Purpose Inductor, 0.08uH, 2%, 1 Element, Ceramic-Core, SMD, 1008, CHIP, 1008, ROHS COMPLIANT Visit Coilcraft Inc Buy
    1008CT-800XKLC Coilcraft Inc General Purpose Inductor, 0.08uH, 10%, 1 Element, SMD, CHIP Visit Coilcraft Inc
    1008CT-800XGLB Coilcraft Inc General Purpose Inductor, 0.08uH, 2%, 1 Element, Ceramic-Core, SMD, 1211, CHIP, 1211, ROHS COMPLIANT Visit Coilcraft Inc
    1008CT-800X Coilcraft Inc RF inductor, ceramic core, 2% tol, SMT, RoHS Visit Coilcraft Inc

    IMS T800 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    T425

    Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
    Text: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal


    Original     		PDF 32-bit T425 T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425

    Inmos t805

    Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
    Text: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support


    Original     		PDF 32-bit Inmos t805 IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414

    inmos T414

    Abstract: inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414
    Text: IMS T400 Low cost 32-bit transputer FEATURES H 32 bit architecture H 50 ns internal cycle time H 20 MHz only H 20 MIPS peak instruction rate H 10 MIPS sustained instruction rate H Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 H 2 Kbytes on-chip static RAM


    Original     		PDF 32-bit inmos T414 inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414

    Untitled

    Abstract: No abstract text available
    Text: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support


    OCR Scan     		PDF IMST414 T805-G20S IMST805-G25S T805-G30S T805-J20S T805-J25S T805-F20S T805-F25S T805-F30S MIL-STD-883

    AD T805

    Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
    Text: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support


    OCR Scan     		PDF 32-bit AD T805 B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425

    T400 600

    Abstract: IMS T414
    Text: Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 ■ 2 Kbytes on-chip static RAM


    OCR Scan     		PDF 32-bit T400 600 IMS T414

    CQ 2AF1

    Abstract: IMST425 IMS T400 Inmos T222
    Text: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal


    OCR Scan     		PDF 32-bit CQ 2AF1 IMST425 IMS T400 Inmos T222

    specifications of tdr

    Abstract: Inmos t805 IMS processor
    Text: SGS-THOMSON IMS T805 ’H E S m M M 32-bit floating-point transputer FEATURES • ■ ■ 32 bit architecture 40 ns internal cycle tim e 25 M IPS peak instruction rate ■ 3.6 M flops (peak) instruction rate ■ Pin co m patible w ith IMS T800, IMS T425, IMS T400


    OCR Scan     		PDF 32-bit specifications of tdr Inmos t805 IMS processor

    Untitled

    Abstract: No abstract text available
    Text: S G S -1 H 0 M S 0 N « t i m i I g ï M a M Ê IMS T400 i Low cost 32-bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425


    OCR Scan     		PDF 32-bit T00b2

    inmos T414

    Abstract: IMS T414 T414 inmos transputer T425 IMSB401 T800 transputer inmos transputer IMSB008 T800 IMST414
    Text: Chapter 17 149 IMS B401 TRAM 32-bit transputer 32 Kbytes Size 1 □ m os Engineering Data Reset Analyse-NotError ^ o /j- IMS T800 LinkO -«- h * or Linkl - - H , IMS T425 32 Kbytes SRAM Link2 Link3. Terminated links FEATURES GENERAL DESCRIPTION


    OCR Scan     		PDF 32-bit chip800-25 T800-20 T425-25 T800-25 B401-3 B401-8 B401-5 inmos T414 IMS T414 T414 inmos transputer T425 IMSB401 T800 transputer inmos transputer IMSB008 T800 IMST414

    D4205

    Abstract: inmos m212 disk processor B4043 D42050 T225 D505A IMS B404 T414 D705B ims-m212
    Text: Chapter 2 9 □ mos IMS D7205 IMS D6205 IMS D5205 IMS D4205 0 C C 3 IT I 2 Toolset Product Information occam cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Occam compiler for INMOS transputer family of processors


    OCR Scan     		PDF D7205 D6205 D5205 D4205 D5205 D6205 inmos m212 disk processor B4043 D42050 T225 D505A IMS B404 T414 D705B ims-m212

    sbl 20100

    Abstract: T425-X25S MEMAD11 inmos transputer T425
    Text: ^•7 # DMD g(fii ilL[l(gTO©[i!!in(gI / = T S G S -T H O M S O N IM S T 4 2 5 32-bit transputer FEATURES ■ 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414


    OCR Scan     		PDF 32-bit sbl 20100 T425-X25S MEMAD11 inmos transputer T425

    inmos m212 disk processor

    Abstract: T222 inmos T414 D5214 IMSB404 inmos transputer reference manual ims-m212 Transputer T414 nec pc9801
    Text: Chapter 3 □ I mos* 23 IMS D7214 IMS D6214 IMS D5214 IMS D4214 ANSI C Toolset Product Information ANSI C cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI C compiler X3.159-1989 • Validated against Plum Hall validation suite


    OCR Scan     		PDF D4214 DC600A QIC-11, QIC-24, inmos m212 disk processor T222 inmos T414 D5214 IMSB404 inmos transputer reference manual ims-m212 Transputer T414 nec pc9801

    inmos transputer T425

    Abstract: T800 B411-8 TRAM IMST800 b008 IMS T800 IMSB008 ims pcb imsb411
    Text: Chapter 20 167 IMS B411 TRAM 3 2 -b it transputer 1 Mbyte Size 1 oímos Engineering Data Reset • Analyse NotError - — < IMS T800 or 1 Mbyte LinkO - >| Linkl IMS T425 DRAM -I Link2 - -Link3 J -Terminated links FEATURES GENERAL DESCRIPTION


    OCR Scan     		PDF T800-20 T425-20 T800-25 T425-25 B411-3 B411-7 B411-5 B411-8 inmos transputer T425 T800 TRAM IMST800 b008 IMS T800 IMSB008 ims pcb imsb411

    IMST414

    Abstract: IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer
    Text: SGS-THOMSON IM S T 4 0 0 Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425


    OCR Scan     		PDF 32-bit IMST414 PLCC100/ IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer

    EIA-343

    Abstract: G300B B-419 g300 video b419
    Text: Chapter 30 243 I M S B 4 1 9 Integrated graphics TRAM Size 6 OinimOS' Engineering Data FEATURES GENERAL DESCRIPTION • The IMS B419 incorporates the IMS G300B Co­ lour Video Controller CVC with the IMS T800 32 bit Floating Point Transputer to form a high per­


    OCR Scan     		PDF T800-20 G300B B419-4 B419-4* F003A-1 F003A-1 EIA-343 B-419 g300 video b419

    T800 transputer

    Abstract: T800 INMOS T800 2512 package resistor dimensions details Inmos inmos static ram
    Text: Chapter 25 203 IMS B427 mos 32-bit transputer 8 Mbytes Size 2 TRAM Engineering Data FEATURES GENERAL DESCRIPTION • 25MHz IMS T800 Transputer • 8 Mbyte of one wait-state DRAM 160 ns memory cycle time The IMS B427 Is a compact size 2 TRAM offering 8Mbytes of 4-cycle DRAM and subsystem


    OCR Scan     		PDF 32-bit 25MHz B427-5 T800-25 B427-5 T800 transputer T800 INMOS T800 2512 package resistor dimensions details Inmos inmos static ram

    inmos T400

    Abstract: T400-T20S AD1230 T4-0065 800-00030 T400-J20S AD123 inmos transputer reference manual imst400
    Text: iZ J S G S -T H O M S O N ^ 7 # . » » I U I © « » IM S T 4 0 0 ® 32 bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425


    OCR Scan     		PDF

    t425

    Abstract: SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425
    Text: w # S G S -T H O M S O N IM < 5 , kT # D ïiin g M iiiL iK g T Â E g n e i ,M & _ T 4 2 5 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMST400 and IMS T414


    OCR Scan     		PDF 32-bit MST400 PGA/84pin PLCC/100 t425 SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425

    ic t805

    Abstract: IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11
    Text: SGS-THOMSON IMS T805E •HI 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate 2.8 Mflops (peak) instruction rate Pin compatible with IMS T800 Floating Point Unit Debugging support


    OCR Scan     		PDF T805E 32-bit ic t805 IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11

    T805E

    Abstract: No abstract text available
    Text: w# SGS-THOMSON IMS T805E 32-bit floating-point transputer - Extended temperature FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MIPS peak instruction rate ■ 2.8 Mflops (peak) instruction rate ■ Pin compatible with IMS T800 ■


    OCR Scan     		PDF T805E 32-bit T805E

    ZR34325

    Abstract: Inmos T800 FLOATING POINT Co Processor f32c INMOS T800
    Text: Chapter 31 255 IMS B420 Vector processing TRAM Size 4 rnnos Engineering Data FEATURES GENERAL DESCRIPTION • IMS T800 -25 or T800 -20 floating point trans­ puter • High performance vector/signal processing co-processor ZR34325 —e.g. 1K complex FFT < 2ms for 25MHz co­


    OCR Scan     		PDF ZR34325) 25MHz B420-3* B420-5* F000A-1 F007A-1 ZR34325 Inmos T800 FLOATING POINT Co Processor f32c INMOS T800

    ZR34325

    Abstract: No abstract text available
    Text: 69 Chapter 8 IMS FOOOB VecTRAM library □ Product Information A software support package for the IMS B420 Vector Processing TRAM KEY FEATURES • Dramatically speeds up parallel applications and increases system performance involving vector/signal processing compulation.


    OCR Scan     		PDF Dx205 Dx214 360Kbyte 720Kbyte ZR34325

    IMSB417

    Abstract: T800 inmos static ram
    Text: Chapter 23 189 IMS B417 TRAM 32-bit transputer 4 Mbytes Size 4 m os Engineering Data Reset Analyse NotError Terminated links Subsystem. PAL FEATURES IMS T800 25 MHz Transputer 64 Kbytes of zero wait-state SRAM 4 Mbytes of single wait-state DRAM Subsystem controller circuitry


    OCR Scan     		PDF 32-bit 25MHz T800-25 B417-5 IMSB417 T800 inmos static ram