INMOS TRANSPUTER T225 Search Results

Contextual Info: IMS T225 7 Links Four identical INMOS bi-directional serial links provide synchronised communication between processors and with the outside world. Each link comprises an input channel and output channel. A link between two transputers is implemented by connecting a link interface on one transputer to a link interface on the other

inmos transputer T225

Abstract: IMST222
Contextual Info: 1 Introduction 1 Introduction The IMS T225 transputer is a 16 bit CMOS microcomputer with 4 Kbytes on-chip RAM for high speed pro­ cessing, an external memory interface and four standard INMOS communication links. The instruction set achieves efficient implementation of high level languages such as ANSI C and provides direct support for

D4205

Abstract: inmos m212 disk processor B4043 D42050 T225 D505A IMS B404 T414 D705B ims-m212
Contextual Info: Chapter 2 9 □ mos IMS D7205 IMS D6205 IMS D5205 IMS D4205 0 C C 3 IT I 2 Toolset Product Information occam cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Occam compiler for INMOS transputer family of processors

T222-20

Abstract: inmos transputer T225 ims pcb B4301 IMSB430 B-430 B430TRAM T225
Contextual Info: Chapter 35 301 IMS B430 Prototyping TRAM mos FEATURES IMS T222 16-bit Transputer User programmable Wait State Generator Two JEDEC user configurable memory sock­ ets with 32Kbyte of SRAM fitted as standard Two memory mapped I/O control signals Large through-hole matrix prototyping area

inmos m212 disk processor

Abstract: T222 inmos T414 D5214 IMSB404 inmos transputer reference manual ims-m212 Transputer T414 nec pc9801
Contextual Info: Chapter 3 □ I mos* 23 IMS D7214 IMS D6214 IMS D5214 IMS D4214 ANSI C Toolset Product Information ANSI C cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI C compiler X3.159-1989 • Validated against Plum Hall validation suite

74F04

Abstract: 74F74 800E 801C T222 T225 T225E Inmos T222
Contextual Info: IMS T225 16-bit transputer FEATURES 16 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 60 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory

T222 transputer

Abstract: 74F74 800E 801C T222 T225 IMST222 T225E
Contextual Info: IMS T225E 16-bit transputer – Extended temperature FEATURES 16 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 40 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory

74F74

Abstract: inmos transputer T225 transputer Inmos t805 FP 8022 74F04 800E 801C T222 T225
Contextual Info: IMS T225 16-bit transputer FEATURES H 16 bit architecture H 33 ns internal cycle time H 30 MIPS peak instruction rate H Debugging support H 4 Kbytes on-chip static RAM H 60 Mbytes/sec sustained data rate to internal memory H 64 Kbytes directly addressable external memory

T225E

Abstract: ST225
Contextual Info: w # S G S -m O M S O N IMS T225E 16-bit transputer - Extended temperature FEATURES • 16 bit architecture ■ 50 ns internal cycle time ■ 20 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 40 Mbytes/sec sustained data rate to internal memory

Contextual Info: S G S -T H O M S O N S IMS T225E s L lP T M lM i 16-bit transputer - Extended temperature FEATURES H 16 bit architecture H 50 ns internal cycle time H 20 MIPS peak instruction rate H Debugging support H 4 Kbytes on-chip static RAM H 40 Mbytes/sec sustained data rate to internal

inmos transputer T225

Abstract: inmos transputer T425 inmos T225 T400 clock transputer IMST222 2U06 T225 801C IMST225
Contextual Info: /^ T A S G S -T H O M S O N T Ë , « fô tm IMS T225 ilg ïïlîM Ig S 16-bit transputer FEATURES • 16 bit architecture ■ 33 ns internal cycle time ■ 30 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 60 Mbytes/sec sustained data rate to internal memory

Contextual Info: SGS-THOMSON IMS T225 • H I 16-bit transputer EATURES 16 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 60 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory

Contextual Info: SCS-IHOMSON -T/ M I » lgllljl5TnM0ieg IMS T225E 16-bit transputer - Extended temperature FEATURES • 16 bit architecture ■ 50 ns internal cycle time ■ 20 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 40 Mbytes/sec sustained data rate to internal memory

Contextual Info: w# SGS-THOMSON IMS T225 16-bit transputer FEATURES • 16 bit architecture ■ 33 ns internal cycle time ■ 30 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 60 Mbytes/sec sustained data rate to internal memory ■ 64 Kbytes directly addressable external memory

CQ 2AF1

Abstract: IMST425 IMS T400 Inmos T222
Contextual Info: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal

inmos T414

Abstract: inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414
Contextual Info: IMS T400 Low cost 32-bit transputer FEATURES H 32 bit architecture H 50 ns internal cycle time H 20 MHz only H 20 MIPS peak instruction rate H 10 MIPS sustained instruction rate H Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 H 2 Kbytes on-chip static RAM

T225E

Abstract: imst225
Contextual Info: _ 16-bit transputer FEATURES • 16 bit architecture ■ 33 ns internal cycle time ■ 30 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 60 Mbytes/sec sustained data rate to internal memory ■

t425

Abstract: SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425
Contextual Info: w # S G S -T H O M S O N IM < 5 , kT # D ïiin g M iiiL iK g T Â E g n e i ,M & _ T 4 2 5 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMST400 and IMS T414

sbl 20100

Abstract: T425-X25S MEMAD11 inmos transputer T425
Contextual Info: ^•7 # DMD g(fii ilL[l(gTO©[i!!in(gI / = T S G S -T H O M S O N IM S T 4 2 5 32-bit transputer FEATURES ■ 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414

T400 600

Abstract: IMS T414
Contextual Info: Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 ■ 2 Kbytes on-chip static RAM

IMST414

Abstract: IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer
Contextual Info: SGS-THOMSON IM S T 4 0 0 Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425

Inmos t805

Abstract: IMS T805-F20E T425 T800 IMST800 21-F5 REAL32
Contextual Info: IMS T805E 32-bit floating-point transputer – Extended temperature FEATURES APPLICATIONS Scientific and mathematical applications High speed multi processor systems High performance graphics processing – HUD/HDD displays Supercomputers Workstations and workstation clusters

Inmos t805

Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
Contextual Info: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

Contextual Info: S G S -1 H 0 M S 0 N « t i m i I g ï M a M Ê IMS T400 i Low cost 32-bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425