IOD30 Search Results

4413

Abstract: IDT77155 IDT77V400 IDT77V500 IDT77V550 IDT79R36100 IDT79RV3041 IDT79RV4640 osam marking code
Contextual Info: SECTION 2 IDT77V400 Switching Memory 2.1 IDT77V400 Switching Memory Description The IDT77V400 Switching Memory is designed to provide essential data path functionality for switches, concentrators and expanders in Asynchronous Transfer Mode ATM Networks. The IDT77V400 supports aggregate data throughput at rates up to 1.24 Gbps and has 8192

cx2812

Abstract: CX-2812 CX171 CX174 LA3122 CX87 CX134 cx59 st7033 cx109
Contextual Info: A B C D E XREF=2/3E ADDR3 XREF=2/3E ADDR2 LAD[31:0] XREF=2/1D,9/1E,12/1E XREF=13/3A,15/1C MASTERCLK AD2 105 AD3 114 AD4 AD5 CPU_ACK_N XREF=2/1A,13/2E 93 CPU_BERR_N XREF=2/1A,13/2E 100 CPU_RETRY_N XREF=2/2A,14/2A 101 ACK AD6 BUSERR AD7 RETRY AD8 AD9 AD10 CPU_BREQ_N

body marking MCL

Abstract: IDT77155 IDT77V400 IDT77V500 IDT77V550 IDT79R36100 IDT79RV3041 IDT79RV4640 PN100-1 osam marking code
Contextual Info: SWITCHStARTM PRELIMINARY ATM CELL BASED IDT77V500 1.24Gbps NON-BLOCKING INTEGRATED SWITCH CONTROLLER Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Single chip controller for IDT77V400 Switching Memory One IDT77V500 and one IDT77V400 form the core required

3606

Contextual Info: PRELIMINARY IDT77V400 SWITCHStAR ATM CELL BASED 8 X 8 NON-BLOCKING SINGLE CHIP SWITCHING MEMORY FEATURES • Configurable cell lengths of 52, 53, 54, 55, or 56 bytes can be independently chosen for Input and Output ports • Byte Addition or Byte Subtraction for x4/x8 to x l 6/x32

IDT77155

Abstract: IDT77V400 IDT77V500 IDT77V550 IDT79R36100 IDT79RV3041 IDT79RV4640 3606
Contextual Info: SWITCHStARTM ATM CELL BASED 8 X 8 PRELIMINARY 1.24Gbps NON-BLOCKING IDT77V400 INTEGRATED SWITCHING MEMORY Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Single chip supports an 8 x 8 port switch at 155Mbps per port Fusion MemoryTM technology utilized to provide the

dr1 315.00

Abstract: mc 13500 672023 SMJ320C30 SMJ320C30KGDB 0.18 um CMOS parameters 74125-1 and/dr1 315.00 dr1 31500
Contextual Info: SMJ320C30KGDB FLOATING-POINT DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE SGUS019B – NOVEMBER 1995 – REVISED DECEMBER 1998 D D D D D D D D D D D D D Military Operating Temperature Range –55°C to 125°C, QML Processing Fast Instruction Cycle Time of 50 ns and

inverter Delta 132 kw three phase

Abstract: 2090-XXLF-xxxx 1756-M08SE 12v to 230v inverters circuit diagrams 1756-OB16 single phase 500VA inverter free circuit diagrams 1768-M04SE error code 2094-xLxxS 2093-AC05-MP5 1756-IB16
Contextual Info: Kinetix 2000 Multi-axis Servo Drive Catalog Numbers 2093-AC05-MP1, 2093-AC05-MP2, 2093-AC05-MP5 2093-AM01, 2093-AM02 2093-AMP1, 2093-AMP2, 2093-AMP5 2093-PRS1, 2093-PRS2, 2093-PRS3, 2093-PRS4, 2093-PRS5, 2093-PRS7, 2093-PRS8S 2093-ASP06 2093-PRF User Manual

Contextual Info: ATM CELL BASED 8 X 8 NON-BLOCKING SINGLE CHIP ADVANCED INFORMATION IDT77V400 SWITCHING MEMORY Integrated D e v ie TechnoJogy, lie . FEATURES: • Byte Addition or Byte Subtraction fo r x8 to x16/x32 U topia conversion capability • Internal header C yclical R edundancy C he ck CRC and

100-PIN

Abstract: IDT77V400 IDT77V500 IDT79R36100 IDT79RV3041 IDT79RV4640 PN100-1
Contextual Info: ATM CELL BASED NON-BLOCKING SINGLE CHIP SWITCH CONTROLLER ADVANCED INFORMATION IDT77V500 Integrated Device Technology, Inc. • Available in a 100-pin Thin Plastic Quad Flat Pack TQFP FEATURES: • Single chip controller for IDT77V400 Switching Memory • One IDT77V500 and one IDT77V400 form the core

B1416

Abstract: E1113 1CS MARKING IDT77V400 IDT77V500 IDT77V550 13-bitcell m1416 s156 A1516
Contextual Info: IDT77V400 SwitchStarTM ATM Cell Based 8 x 8 1.2Gbps non-blocking Integrated Switching Memory Features List ! Single chip supports an 8 x 8 port switch at 155Mbps per port ! Central Memory Architecture eliminates Head-of-Line Blocking by sharing the memory array with all ports

dr1 315.00

Abstract: qmi 3555 mc 13500 7412 pin configuration 320C3 0.18 um CMOS parameters 0.18 um CMOS 74 AS 00 672023 8618
Contextual Info: SMJ320C30KGDB FLOATING-POINT DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE SGUS019C – NOVEMBER 1995 – REVISED OCTOBER 2001 D D D D D D D D D D D D D Military Operating Temperature Range –55°C to 125°C, QML Processing Fast Instruction Cycle Time of 50 ns and

Contextual Info: PRELIMINARY IDT77V400 SWITCHStAR ATM CELL BASED 8 X 8 NON-BLOCKING SINGLE CHIP SWITCHING MEMORY In teg ra ted D e v i l e T e c h n o lo g y , l i e . FEATURES • Configurable cell lengths of 52, 53, 54, 55, or 56 bytes can be independently chosen for Input and Output ports

b1416

Abstract: D1416 b14-16 IDT77155 IDT77V400 IDT77V500 IDT77V550 IDT79R36100 IDT79RV3041 IDT79RV4640
Contextual Info: IDT77V400 SwitchStarTM ATM Cell Based 8 x 8 1.2Gbps non-blocking Integrated Switching Memory
Configurable cell lengths of 52, 53, 54, 55, or 56 bytes can
  
Single chip supports an 8 x 8 port switch at 155Mbps per be independently chosen for Input and Output ports

C3607

Abstract: 100-PIN IDT77155 IDT77V400 IDT77V500 IDT79R36100 IDT79RV3041 IDT79RV4640 PN100-1
Contextual Info: SWITCHStARTM ATM CELL BASED NON-BLOCKING SINGLE CHIP SWITCH CONTROLLER PRELIMINARY IDT77V500 Integrated Device Technology, Inc. without derating for larger switch configurations • Industrial temperature range -40° C to +85° C available • Single +3.3V ± 0.3V power supply

dr1 315.00

Abstract: 0.18 um CMOS parameters SMJ320C30 SMJ320C30KGDB
Contextual Info: SMJ320C30KGDB FLOATING-POINT DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE SGUS019C – NOVEMBER 1995 – REVISED OCTOBER 2001 D D D D D D D D D D D D D Military Operating Temperature Range –55°C to 125°C, QML Processing Fast Instruction Cycle Time of 50 ns and

IDT77V500

Abstract: IDT79R36100 IDT79RV3041 IDT79RV4640 IOD031 IDT77V400 OP7D 3606
Contextual Info: ATM CELL BASED 8 X 8 NON-BLOCKING SINGLE CHIP SWITCHING MEMORY ADVANCED INFORMATION IDT77V400 Integrated Device Technology, Inc. FEATURES: • Byte Addition or Byte Subtraction for x8 to x16/x32 Utopia conversion capability • Internal header Cyclical Redundancy Check CRC and

BC-144-1

Abstract: IDT77V400 IDT77V500
Contextual Info: IDT77V500 SwitchStarTM ATM Cell Based 1.2Gbps non-blocking Integrated Switch Controller
  ◆ One IDT77V500 can manage up to eight IDT77V400's without derating for larger switch configurations Industrial temperature range -40° C to +85° C is available

1784

Abstract: SMJ320C30 SMJ320C30KGDB qmi 3555 dr1 315.00
Contextual Info: SMJ320C30KGDB FLOATING-POINT DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE SGUS019C – NOVEMBER 1995 – REVISED OCTOBER 2001 D D D D D D D D D D D D D Military Operating Temperature Range –55°C to 125°C, QML Processing Fast Instruction Cycle Time of 50 ns and

IDT77V550

Abstract: PN100-11 IDT77V400 IDT77V500
Contextual Info: IDT77V500 SwitchStarTM ATM Cell Based 1.2Gbps non-blocking Integrated Switch Controller Features ◆ Single chip controller for IDT77V400 Switching Memory One IDT77V500 and one IDT77V400 form the core required for a 1.2Gbps 8 x 8 port non-blocking switch ◆ Supports up to 8192 Virtual Connections VCs

IDT77V400

Abstract: IDT77V500 IDT77V550 PN100-11
Contextual Info: IDT77V500 SwitchStarTM ATM Cell Based 1.2Gbps non-blocking Integrated Switch Controller Features ◆ Single chip controller for IDT77V400 Switching Memory One IDT77V500 and one IDT77V400 form the core required for a 1.2Gbps 8 x 8 port non-blocking switch ◆ Supports up to 8192 Virtual Connections VCs

tle 6366

Contextual Info: SWITCHStAR ATM CELL BASED 8 X 8 PRELIMINARY 1.24Gbps NON-BLOCKING IDT77V400 INTEGRATED SWITCHING MEMORY Features Single chip supports an 8 x 8 port switch at 155Mbps per port Fusion Memory™ technology utilized to provide the performance of SRAM with the economy of DRAM

IDT77V400

Abstract: IDT77V500 IDT77V550 IOD-11 D14-16 3606
Contextual Info: IDT77V400 SwitchStarTM ATM Cell Based 8 x 8 1.2Gbps non-blocking Integrated Switching Memory Features List ! Single chip supports an 8 x 8 port switch at 155Mbps per port ! Central Memory Architecture eliminates Head-of-Line Blocking by sharing the memory array with all ports

IOD17

Abstract: IOD16 IOD22 3606
Contextual Info: IDT77V400 SwitchStarTM ATM Cell Based 8 x 8 1.2Gbps non-blocking Integrated Switching Memory
Configurable cell lengths of 52, 53, 54, 55, or 56 bytes can
  
Single chip supports an 8 x 8 port switch at 155Mbps per be independently chosen for Input and Output ports