J20.C PACKAGE Search Results

J201

Contextual Info: PACKAGE INFORMATION Micrel 20 LEAD PLCC J20-1 Rev. 00 Rev.: C 1 Amendment: 0 Issue Date: July, 1999

Contextual Info: Hermetic Packages for Integrated Circuits Ceramic Leadless Chip Carrier Packages CLCC J20.C MIL-STD-1835 CQCC3-N20 (C-13) 20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE 0.010 S E H S D INCHES D3 j x 45o E3 B E h x 45o 0.010 S E F S A A1 PLANE 2 PLANE 1 -E-

CERAMIC LEADLESS CHIP CARRIER

Abstract: J20.C Package
Contextual Info: Ceramic Packages Ceramic Leadless Chip Carrier Packages CLCC J20.C MIL-STD-1835 CQCC3-N20 (C-13) 20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE 0.010 S E H S D INCHES D3 j x 45o E3 B E 0.010 S E F S A A1 PLANE 2 PLANE 1 -E- SYMBOL MIN MAX MIN MAX NOTES A 0.060

CQCC1-N20

Abstract: CERAMIC LEADLESS CHIP CARRIER n20 n
Contextual Info: Ceramic Package Ceramic Leadless Chip Carrier Packages CLCC J20.A MIL-STD-1835 CQCC1-N20 (C-2) 20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE 0.010 S E H S D INCHES D3 j x 45 o E3 B E MIN MAX MIN MAX NOTES A 0.060 0.100 1.52 2.54 6, 7 A1 0.050 0.088 1.27 2.23

CQCC1-N20

Abstract: ne55 CERAMIC LEADLESS CHIP CARRIER
Contextual Info: Hermetic Packages for Integrated Circuits Ceramic Leadless Chip Carrier Packages CLCC J20.A MIL-STD-1835 CQCC1-N20 (C-2) 20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE 0.010 S E H S D INCHES D3 j x 45o E3 B E h x 45o 0.010 S E F S A PLANE 2 PLANE 1 -E- MIN

Contextual Info: Part Number 856661 1950 MHz SAW Filter Data Sheet Features • • • • • • • • • For UMTS band applications Usable bandwidth 60 MHz Low loss High attenuation Single-ended operation Ceramic chip-scale Package CSP Small Size Hermetic RoHS compliant (2002/95/EC), Pb-free

max703mja

Abstract: LCC-28 OP07P OP-07P TRUE RMS-TO-DC CONVERTER MX7502SQ IH5048
Contextual Info: SCOPE: QUAD, SPST, CMOS, TTL-Compatible Analog Switches Device Type: -01 -02 Generic Number: DG308AA x /883B DG309A(x)/883B Case Outline(s). Outline Letter Mil-Std-1835 K GDIP1-T16 or CDIP2-T16 Case Outline 16 LEAD CERDIP Package Code J16 Absolute Maximum Ratings

Contextual Info: SCOPE: CMOS 8-Bit, µP-Compatible, 12-Bit D/A Converter Device Type: -01 -02 Generic Number: MX7548S x /883B MX7548T(x)/883B Case Outline(s). Outline Letter Q E Mil-Std-1835 GDIP1-T20 or CDIP2-T20 CQCC1-N20 Case Outline Package Code 20 Lead CERDIP J20 20-Pin Ceramic LCC

DG41123

Abstract: IH5048
Contextual Info: SCOPE: CMOS, TTL-COMPATIBLE ANALOG MULTIPLEXER Device Type 01 02 Generic Number DG528A x /883B DG529A(x)/883B Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Outline Letter K Z Case Outline Package Code Mil-Std-1835 GDIP1-T18 or CDIP2-T18

OP07P

Abstract: OP-07P L7667mja max3912 IH514851 max703mja IH5341MTW MX7502SQ IH5048
Contextual Info: SCOPE: HIGH VOLTAGE, FAULT PROTECTED, ANALOG MULTIPLEXER Device Type 01 02 Generic Number MAX378M x /883B MAX379M(x)/883B Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Outline Letter JE LP Case Outline Package Code

Contextual Info: SCOPE: CMOS DUAL 12-BIT DOUBLE-BUFFERED µP-COMPATIBLE DAC Device Type 01 02 Generic Number MX7549S x /883B MX7549T(x)/883B Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Outline Letter Q E Case Outline Package Code

Contextual Info: Commercial INC. PEEL 16V8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Features • Compatible with Popular 16V8 Devices — 16V8 socket and function compatible — Programs with standard 16V8 JEDEC file — 20-pin DIP, SOIC, and PLCC packages

Contextual Info: Commercial INC. PEEL 16V8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Features • Compatible with Popular 16V8 Devices — 16V8 socket and function compatible — Programs with standard 16V8 JEDEC file — 20-pin DIP, SOIC, and PLCC packages

Contextual Info: SCOPE: CMOS HIGHSPEED 8-BIT A/D CONVERTER WITH TRACK AND HOLD Device Type 01 02 Generic Number MX7820U x /883B MX7820T(x)/883B Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Outline Letter Mil-Std-1835 Case Outline Package Code

5962-8780201RA

Abstract: MX7226 5962-87802012C CQCC1-N20
Contextual Info: SCOPE: QUAD, CMOS, 8-BIT D/A CONVERTER Device Type 01 Generic Number MX7226T x /883B Circuit Function DAC with 2 LSB Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Case Outline Package Code Outline Letter Mil-Std-1835

Contextual Info: SCOPE: QUAD, CMOS, 8-BIT D/A CONVERTER Device Type 01 Generic Number MX7226T x /883B Circuit Function DAC with 2 LSB Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Outline Letter Mil-Std-1835 Case Outline Package Code

Contextual Info: TOSHIBA IHOS MEMORY PRODUCTS TC55328P/J-20, TC55328P/J-25 TC55328P/J-35 |D E S C R I P T I O N | The TC55328P/J is a 262,144 bits high speed static random access memory organized as 32,768 words by 8 bits using CMOS technology, and operated from a single 5-volt supply.

tc5589p

Abstract: TC5589 TC-5589
Contextual Info: TOSHIBA MOS MEMORY PRODUCTS TC5589P/J-15, TC5589P/J-20, TC5589P/J-25 description! The TC5589P/J is a 73,728 bits high speed static random access memory organized as 8,192 words by 9 bits using CMOS technology, and operated from a single 5-volt supply, Toshiba's CMOS technology and advanced circuit form provides high speed feature,

1VA120

Contextual Info: TOSHIBA MOS MEMORY PRODÜCTS TC55464P/J-20, TC55464P/J-25 TC55464P/J-35 ,_ , ID E S C R IP T IO N 1 The TC55464P/J is a 262,144 b i ts high speed s t a t i c random access memory organ ized as 65,536 words by 4 b i ts using CMOS tech n o lo g y , and operated from a s in g le 5 -v o lt supply.

C5588

Abstract: 1cb2 tc5588p
Contextual Info: TOSHIBA MOS MEMORY PRODUCTS TC5588P/J-15, TC5588P/J-20, TC5588P/J-25 ¡d e s c r i p t i o n ! The TC5588P/J is a 65,536 bits high speed static random access memory organized as 8,192 words by 8 bits using CMOS technology, and operated from a single 5-vblt supply.

TC55465P

Abstract: 74c74
Contextual Info: TC55465P/J—17, TC55465P/J-20 T P c c a G c m I o c T P c o i e c 65,536 WORD X 4 BIT CMOS STATIC RAM DESCRIPTION The TC55465P/J is a 262,144 bits high speed static random access memory organized as 65,536 words by 4 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba's CMOS

912BI

Contextual Info: TOSHIBA NIOS MEMORY PRODUCTS TC55329P/J-20, TC55329P/J-25 TC55329P/J-35 DESCRIPTION The TC55329P/J is a 294,912 b i t s high speed s t a tic random access memory organ ized as 32,768 words by 9 b i t s using CMOS technolo gy, and operated from a s in g le 5 -v o lt supply.

Contextual Info: 65 ,536 W O R D x 4 BIT C M OS STATIC R A M DESCRIPTION The TC55464P/J is a 262,144 bits high speed static random access memory organized as 65,536 words by 4 bits using CMOS technology, and operated from a single 5 —volt supply. Toshiba’s CMOS technology and advanced circuit form provide high speed feature.

c0ee

Contextual Info: TOSHIBA MOS MEMORY PRODUCTS TC55417P/J-20, TC55417P/J-25, TC55417P/J-35 [d e s c r i p t i o n ! The TC55417P/J is a 65,536 bit high speed static random access memory organized as 16,384 words by 4 bits using CMOS technology, and operated from a single 5-volt supply.