JEDEC FBGA Search Results

AS4C32M16D2

Contextual Info: AS4C32M16D2 512M 32M x 16 bit DDRII Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 1.1, Feb. /2013) Features Overview • JEDEC Standard Compliant  JEDEC standard 1.8V I/O (SSTL_18-compatible)  Power supplies: VDD & VDDQ = +1.8V  0.1V  Supports JEDEC clock jitter specification

Contextual Info: AS4C32M16D2 512M 32M x 16 bit DDRII Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 1.1, Feb. /2013) Features Overview • JEDEC Standard Compliant  JEDEC standard 1.8V I/O (SSTL_18-compatible)  Power supplies: VDD & VDDQ = +1.8V  0.1V  Supports JEDEC clock jitter specification

K4W1G1646D-EC15

Abstract: K4W1G1646D-EJ11 K4W1G1646D-EC gDDR3-1800 DDR3 DIMM 240 pinout GDDR3 SDRAM 256Mb JESD51-2 VIH150 SAMSUNG GDDR3 K4W1G1646D
Contextual Info: 1Gb gDDR3 SDRAM K4W1G1646D 1Gb gDDR3 SGRAM D-die 100 FBGA with Lead-Free & Halogen-Free RoHS Compliant CAUTION : * This document includes some items still under discussion in JEDEC. * Therefore, those may be changed without pre-notice based on JEDEC progress.

K4W1G1646E

Abstract: samsung K4W1G1646E-HC11
Contextual Info: 1Gb gDDR3 SDRAM K4W1G1646E 1Gb gDDR3 SDRAM E-die 96 FBGA with Lead-Free & Halogen-Free RoHS Compliant CAUTION : * This document includes some items still under discussion in JEDEC. * Therefore, those may be changed without pre-notice based on JEDEC progress.

K4W1G1646D-EC15

Abstract: K4W1G1646D
Contextual Info: 1Gb gDDR3 SDRAM K4W1G1646D 1Gb gDDR3 SGRAM D-die 100 FBGA with Lead-Free & Halogen-Free RoHS Compliant CAUTION : * This document includes some items still under discussion in JEDEC. * Therefore, those may be changed without pre-notice based on JEDEC progress.

k4b1g1646

Abstract: k4b1g08 samsung ddr3 DDR3-1066 JESD79-3B
Contextual Info: 1Gb DDR3 SDRAM K4B1G04 08/16 46D 1Gb D-die DDR3 SDRAM Specification 82 / 100 FBGA with Lead-Free & Halogen-Free (RoHS Compliant) CAUTION : * This document includes some items still under discussion in JEDEC. * Therefore, those may be changed without pre-notice based on JEDEC progress.

samsung ddr3

Abstract: DDR3 DIMM 240 pinout DDR3-1066 DDR3-1333 K4B1G16 Design Guide for DDR3-1066 k4b1g08 K4B1G0846D K4B1G0446D DDR3-800-666
Contextual Info: 1Gb DDR3 SDRAM K4B1G04 08/16 46D 1Gb D-die DDR3 SDRAM Specification 82 / 100 FBGA with Pb-free & Halogen-Free (RoHS Compliant) CAUTION : * This document includes some items still under discussion in JEDEC. * Therefore, those may be changed without pre-notice based on JEDEC progress.

K4B2G1646B-HCH9

Abstract: "2Gb DDR3 SDRAM" k4B2G1646 k4b2g1646b 128mx16 ddr3 K4B2G0846B-HCH9 samsung DDR3 SDRAM 2GB K4B2G16 DDR3 DRAM 2GB 128Mx16 96BALL FBGA K4B2G0846B-HCF7
Contextual Info: 2Gb DDR3 SDRAM K4B2G04 08/16 46B 2Gb B-die DDR3 SDRAM Specification 78 / 96 FBGA with Lead-Free & Halogen-Free (RoHS Compliant) CAUTION : * This document includes some items still under discussion in JEDEC. * Therefore, those may be changed without pre-notice based on JEDEC progress.

Contextual Info: 1Gb DDR3 SDRAM K4B1G04 08/16 46D 1Gb D-die DDR3 SDRAM Specification 82 / 100 FBGA with Pb-free & Halogen-Free (RoHS Compliant) CAUTION : * This document includes some items still under discussion in JEDEC. * Therefore, those may be changed without pre-notice based on JEDEC progress.

MO-205

Abstract: TAPE AND REEL BGA 54-BALL
Contextual Info: Revised May 2001 BGA Tape and Reel Specifications Tape and Reel Quantities Package Code GX Package Description Package Drawing Number Tape and Reel Container Quantity 54-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide BGA54A 2500 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

A110 E

Abstract: TSW11
Contextual Info: Preliminary 512Mb DDR3 SDRAM K4B510846E 512Mb E-die DDR3 SDRAM Specification Revision 0.5 December 2006 CAUTION : * This document includes some items still under discussion in JEDEC. * Therefore, those may be changed without pre-notice based on JEDEC progress.

EM68B16CWQC

Abstract: EM68B16C EM68B16CWQC-25H 6-10PER EM68B16 DDR2-667 DDR2-800 EM68B16CW
Contextual Info: EtronTech EM68B16CWQC 32M x 16 bit DDRII Synchronous DRAM SDRAM Etron Confidential Advanced (Rev 1.4 Aug. / 2010) Features Overview • JEDEC Standard Compliant • JEDEC standard 1.8V I/O (SSTL_18-compatible) • Power supplies: VDD & VDDQ = +1.8V ± 0.1V

EM68B16CWPA

Abstract: EM68B16CWPA-25H EM68B16C Etron DDR2-667 DDR2-800 2TWR EM68B16CWPA25H
Contextual Info: EtronTech EM68B16CWPA 32M x 16 bit DDRII Synchronous DRAM SDRAM Etron Confidential Preliminary (Rev 1.5 Feb. / 2010) Features Overview • JEDEC Standard Compliant • JEDEC standard 1.8V I/O (SSTL_18-compatible) • Power supplies: VDD & VDDQ = +1.8V ± 0.1V

EM68A16CWQB-25H

Abstract: EM68A16CWQB 2TWR EM68A Etron em68a16
Contextual Info: EtronTech EM68A16CWQB 16M x 16 bit DDRII Synchronous DRAM SDRAM Etron Confidential Advanced (Rev 1.1 July / 2010) Features Overview • JEDEC Standard Compliant • JEDEC standard 1.8V I/O (SSTL_18-compatible) • Power supplies: VDD & VDDQ = +1.8V ± 0.1V

JEDEC SPD No.21

Abstract: JEDEC MO 224 MO-224 dimm ddr 400 x16 configuration sdram pcb gerber PC2100 PC2700 SDA Physical Layer Specification Version 2.00 gerber so-dimm 200
Contextual Info: JEDEC Standard No. 21–C Page 4.20.6–1 4.20.6 – 200 Pin, PC2700 DDR SDRAM Unbuffered SO–DIMM REFERENCE DESIGN SPECIFICATION PC2700 DDR SDRAM Unbuffered SO-DIMM Reference Design Specification Revision 1.0 Release 11 Revision 1.0 JEDEC Standard No. 21–C

AS4C128M8D2

Contextual Info: AS4C128M8D2 128M x 8 bit DDRII Synchronous DRAM SDRAM Confidential Advanced (Rev. 1.0, Jun. /2013) Features Overview • JEDEC Standard Compliant  JEDEC standard 1.8V I/O (SSTL_18-compatible)  Power supplies: VDD & VDDQ = +1.8V  0.1V  Operating temperature range

AS4C64M8D2

Contextual Info: AS4C64M8D2 512M – 64M x 8 bit DDRII Synchronous DRAM (SDRAM) Confidential (Rev. 1.0, Feb. /2014) Features Overview • JEDEC Standard Compliant  JEDEC standard 1.8V I/O (SSTL_18-compatible)  Power supplies: VDD & VDDQ = +1.8V  0.1V  Operating temperature: 0 – 95 °C

SAMSUNG ELECTRONICS ddr4

Contextual Info: Rev. 0.5, Feb. 2014 K4A4G165WD Preliminary 4Gb D-die DDR4 SDRAM x16 only 96FBGA with Lead-Free & Halogen-Free RoHS compliant CAUTION : This document includes some items still under discussion in JEDEC. Therefore, those may be changed without pre-notice based on JEDEC progress.

K4T1G164QF

Abstract: M470T5663FB3-C
Contextual Info: Rev. 0.5, Apr. 2010 M470T2864FB3 M470T5663FB3 Preliminary 200pin Unbuffered SODIMM based on 1Gb F-die 60FBGA/84FBGA with Lead-Free & Halogen-Free RoHS compliant CAUTION : This document includes some items still under discussion in JEDEC. Therefore, those may be changed without pre-notice based on JEDEC progress.

BF96A

Abstract: CY2SSTU32864 Q11A delta v dcs t1 96x M4F4
Contextual Info: CY2SSTU32864 PRELIMINARY 1.8V, 25-bit 1:1 or 14-bit (1:2) JEDEC-Compliant Data Register Features • Operating frequency: DC to 500 MHz • Supports DDRII SDRAM • Two operations modes: 25 bit (1:1) and 14 bit (1:2) • 1.8V operation • Fully JEDEC-compliant

CY2SSTU32864

Abstract: Q11A Q13A Q15-25 CY2SSTU32864BVXIT CY2SSTU32864BVXI BA96A t1 96x
Contextual Info: PRELIMINARY CY2SSTU32864 1.8V, 25-bit 1:1 or 14-bit (1:2) JEDEC-Compliant Data Register Features • • • • • • Operating frequency: DC to 500 MHz Supports DDRII SDRAM Two operations modes: 25 bit (1:1) and 14 bit (1:2) 1.8V operation Fully JEDEC-compliant

Contextual Info: V826765G24SA 1GB 200-PIN DDR UNBUFFERED SODIMM 128M x 64 Features Description • JEDEC 200 Pin DDR Unbuffered Small-Outline, Dual In-Line memory module SODIMM ; 134,217,728 x 64 bit organization. ■ Utilizes High Performance 64M x 8 DDR SDRAM in FBGA Packages

Contextual Info: V826765G24SB 1GB 200-PIN DDR UNBUFFERED SODIMM 128M x 64 Features Description • JEDEC 200 Pin DDR Unbuffered Small-Outline, Dual In-Line memory module SODIMM ; 134,217,728 x 64 bit organization. ■ Utilizes High Performance 64M x 8 DDR SDRAM in FBGA Packages

ddr4

Contextual Info: V826765G24SB 1GB 200-PIN DDR UNBUFFERED SODIMM 128M x 64 Features Description • JEDEC 200 Pin DDR Unbuffered Small-Outline, Dual In-Line memory module SODIMM ; 134,217,728 x 64 bit organization. ■ Utilizes High Performance 64M x 8 DDR SDRAM in FBGA Packages