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    JEDEC PACKAGE STANDARDS SO8 Search Results

    JEDEC PACKAGE STANDARDS SO8 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPH9R00CQH Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH2R408QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance Visit Toshiba Electronic Devices & Storage Corporation
    XPH2R106NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 110 A, 0.0021 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    XPH3R206NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 70 A, 0.0032 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    TPH4R008QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 86 A, 0.004 Ohm@10V, SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation

    JEDEC PACKAGE STANDARDS SO8 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    schematic impulse sealer

    Abstract: XC4010E-PQ208 JEDEC Package Code MS-026-AED XC4013E-PQ240 JEDEC MS-026 footprint MS-026-ACB footprint jedec MS-026 TQFP 128 XC4013E-BG225 PG299-XC4025E bav 21 diode
    Text: Packages and Thermal Characteristics R February 2, 1999 Version 2.1 11* Package Information Inches vs. Millimeters The JEDEC standards for PLCC, CQFP, and PGA packages define package dimensions in inches. The lead spacing is specified as 25, 50, or 100 mils (0.025", 0.050" or


    Original     		PDF

    JEDEC Package Code MS-026-AED

    Abstract: EFTEC-64 schematic impulse sealer footprint jedec MS-026 TQFP PQ-208 footprint jedec MS-026 TQFP 128 QFP PACKAGE thermal resistance die down EIA standards 481 ipc-sm-786A VQ44
    Text: • Packages and Thermal Characteristics  November 20, 1997 Version 2.0 10* Package Information Inches vs. Millimeters The JEDEC standards for PLCC, CQFP, and PGA packages define package dimensions in inches. The lead spacing is specified as 25, 50, or 100 mils (0.025", 0.050" or


    Original     		PDF

    footprint jedec MS-026 TQFP

    Abstract: JEDEC MS-026 footprint qfp 64 0.5 mm pitch land pattern fine BGA thermal profile schematic impulse sealer HQ208 PQ100 land pattern QFP 208 PQ208 TQ100
    Text: Packages and Thermal Characteristics R February 2, 1999 Version 2.1 11* Package Information Inches vs. Millimeters The JEDEC standards for PLCC, CQFP, and PGA packages define package dimensions in inches. The lead spacing is specified as 25, 50, or 100 mils (0.025", 0.050" or


    Original     		PDF

    schematic impulse sealer

    Abstract: leadframe C7025 MO-151-BAR PG223-XC4013E XC4010E-PQ208 BGA 31 x 31 mm footprint jedec MS-026 TQFP 128 footprint jedec mo-067 XC4013E-PQ240 EIA standards 481
    Text: Packages and Thermal Characteristics R February 15, 2000 Version 2.1 8* Package Information Inches vs. Millimeters The JEDEC standards for PLCC, CQFP, and PGA packages define package dimensions in inches. The lead spacing is specified as 25, 50, or 100 mils (0.025", 0.050" or


    Original     		PDF FG860 FG900 FG1156 schematic impulse sealer leadframe C7025 MO-151-BAR PG223-XC4013E XC4010E-PQ208 BGA 31 x 31 mm footprint jedec MS-026 TQFP 128 footprint jedec mo-067 XC4013E-PQ240 EIA standards 481

    schematic impulse sealer

    Abstract: qfp 64 0.4 mm pitch land pattern Rotron pk100 power supply XC4013E-PQ240 EFTEC-64 XC4010E-PQ208 MO-151-AAN-1 PK100 land pattern for TSOP 2 86 PIN
    Text: Packages and Thermal Characteristics: High-Reliability Products R 0 5 PK100 v1.0 June 15, 2000 Package Information Inches vs. Millimeters The JEDEC standards for PLCC, CQFP, and PGA packages define package dimensions in inches. The lead spacing is specified as 25, 50, or 100 mils (0.025", 0.050" or 0.100").


    Original     		PDF PK100 060ROM schematic impulse sealer qfp 64 0.4 mm pitch land pattern Rotron pk100 power supply XC4013E-PQ240 EFTEC-64 XC4010E-PQ208 MO-151-AAN-1 PK100 land pattern for TSOP 2 86 PIN

    footprint jedec MS-026 TQFP 128

    Abstract: schematic impulse sealer footprint jedec MS-026 TQFP TSOP 86 land pattern BAV 235 BGA and QFP Package xc4010e-pq208 leadframe C7025 QFP PACKAGE thermal resistance CB228
    Text: 08 001-022_pkg.fm Page 1 Tuesday, March 14, 2000 2:15 PM Packages and Thermal Characteristics R February 15, 2000 Version 2.1 8* Package Information Inches vs. Millimeters The JEDEC standards for PLCC, CQFP, and PGA packages define package dimensions in inches. The lead spacing is specified as 25, 50, or 100 mils (0.025", 0.050" or


    Original     		PDF FG860 FG900 FG1156 footprint jedec MS-026 TQFP 128 schematic impulse sealer footprint jedec MS-026 TQFP TSOP 86 land pattern BAV 235 BGA and QFP Package xc4010e-pq208 leadframe C7025 QFP PACKAGE thermal resistance CB228

    ETP282

    Abstract: dviulc6-4sc6 ETP01-162RL tm 1621 GR-1089 CA2H UL61950 ETP01-xx21
    Text: ETP01-xx21 Protection for Ethernet lines Features • Differential and common mode protection ■ Telcordia GR1089 Intrabuilding: 100 A, 2/10 µs ■ ITU-T K20/21: 37.5 A, 5/310 µs ■ Low capacitance: 13 pF max at 0 V ■ UL94 V0 approved resin ■ SO8 package is JEDEC registered


    Original     		PDF ETP01-xx21 GR1089 K20/21: UL61950, IEC950 UL1459. ETP282 dviulc6-4sc6 ETP01-162RL tm 1621 GR-1089 CA2H UL61950 ETP01-xx21

    GR-1089

    Abstract: air core planar transformer
    Text: ETP01-xx21 Protection for Ethernet lines Features • Differential and common mode protection ■ Telcordia GR1089 Intrabuilding: 100 A, 2/10 µs ■ ITU-T K20/21: 40 A, 5/310 µs ■ Low capacitance: 13 pF max at 0 V ■ UL94 V0 approved resin ■ SO8 package is JEDEC registered


    Original     		PDF ETP01-xx21 GR1089 K20/21: UL61950, UL1459. GR-1089 air core planar transformer

    Untitled

    Abstract: No abstract text available
    Text: SO 8 PSMN013-30KL N-channel 30 V 13 mΩ logic-level MOSFET in SO8 Rev. 01 — 14 April 2011 Objective data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode MOSFET in SO8 package qualified to 150 °C. This product is designed and qualified for use in a wide range of industrial,


    Original     		PDF PSMN013-30KL

    Untitled

    Abstract: No abstract text available
    Text: SO 8 PSMN017-30KL N-channel 30 V 17 mΩ logic-level MOSFET in SO8 Rev. 01 — 14 April 2011 Objective data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode MOSFET in SO8 package qualified to 150 °C. This product is designed and qualified for use in a wide range of industrial,


    Original     		PDF PSMN017-30KL

    Untitled

    Abstract: No abstract text available
    Text: SO 8 PSMN5R5-30KL N-channel 30 V 5.8 mΩ logic-level MOSFET in SO8 Rev. 01 — 17 March 2011 Objective data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode MOSFET in SO8 package qualified to 150 °C. This product is designed and qualified for use in a wide range of industrial,


    Original     		PDF PSMN5R5-30KL

    Untitled

    Abstract: No abstract text available
    Text: SO 8 PSMN9R0-30KL N-channel 30 V 9 mΩ logic-level MOSFET in SO8 Rev. 01 — 14 April 2011 Objective data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode MOSFET in SO8 package qualified to 150 °C. This product is designed and qualified for use in a wide range of industrial,


    Original     		PDF PSMN9R0-30KL

    TRANSISTOR SMD MARKING CODE 7A

    Abstract: No abstract text available
    Text: 3.3 V Digital Optocoupler Family Product Selection 3.3V Family 15 MBd Logic Gate Optocoupler Device Part No. Package 300 mil SO8 DIP Single NC 1 VCC 8 ANODE 2 3 4 NC SHIELD VCC ANODE 2 34 • HCPL-063L HCPL-263L • PWD 1000 10000 15000 Peak Voltage ns (max)


    Original     		PDF HCPL-063L HCPL-263L HCPL-060L HCPL-260L 5988-4588EN TRANSISTOR SMD MARKING CODE 7A

    NUP4301MR6T1

    Abstract: NUP1301 NUP4201DR2 Pulse Guard transformer protection based microcontroller
    Text: AND8104/D MicroIntegrationt Technology Solutions for Protection in High Speed I/O Data Lines Prepared by: Alejandro Lara ON Semiconductor Applications Engineer APPLICATION NOTE Electrostatic Discharge Generation When two insulating materials are rubbed together, an


    Original     		PDF AND8104/D r14525 NUP4301MR6T1 NUP1301 NUP4201DR2 Pulse Guard transformer protection based microcontroller

    DT97-3

    Abstract: JESD22-A114F
    Text: August 9, 2011 IRS2001MPBF HIGH AND LOW SIDE DRIVER Features • • • • • • • • • • Floating channel designed for bootstrap operation Fully operational to +200V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10V to 20V


    Original     		PDF IRS2001MPBF 290mA 600mA 160ns 150ns IRS2001 DT97-3 JESD22-A114F

    JESD47

    Abstract: IRS2001 16L-MLPQ
    Text: November 19, 2010 IRS2001MPBF HIGH AND LOW SIDE DRIVER Features •          Floating channel designed for bootstrap operation Fully operational to +200V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10V to 20V


    Original     		PDF IRS2001MPBF 290mA 600mA 160ns 150ns IRS2001 JESD47 16L-MLPQ

    IRS2001MPBF

    Abstract: No abstract text available
    Text: May 14, 2012 IRS2001MPBF HIGH AND LOW SIDE DRIVER Features • • • • • • • • • • Floating channel designed for bootstrap operation Fully operational to +200V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10V to 20V


    Original     		PDF IRS2001MPBF 290mA 600mA 160ns 150ns IRS2001 IRS2001MPBF

    Untitled

    Abstract: No abstract text available
    Text: SIDACtor Protection Thyristors Broadband Optimized Protection SDP Biased Series - 5x6 QFN RoHS Description This new SDP Biased series provides overvoltage protection for applications such as VDSL2, ADSL2, and ADSL2+ with minimal effect on data signals. This latest


    Original     		PDF 30MHz)

    8002 1035

    Abstract: No abstract text available
    Text: SIDACtor Protection Thyristors Broadband Optimized Protection SDP Biased Series - 5x6 QFN RoHS Pb e3 Description This new SDP Biased series provides overvoltage protection for applications such as VDSL2, ADSL2, and ADSL2+ with minimal effect on data signals. This latest


    Original     		PDF 30MHz) 8002 1035

    Untitled

    Abstract: No abstract text available
    Text: SIDACtor Protection Thyristors Broadband Optimized Protection SDP Series - 5x6 QFN Description This new SIDACtor® Series provides overvoltage protection GPSBQQMJDBUJPOTTVDIBT"%4- BOE#BTF5XJUIB minimal effect on data signals. This latest silicon design


    Original     		PDF 30MHz) E133083

    Untitled

    Abstract: No abstract text available
    Text: SIDACtor Protection Thyristors Broadband Optimized Protection SDP Biased Series - 5x6 QFN RoHS Description This new SDP Biased series provides overvoltage protection for applications such as VDSL2, ADSL2, and ADSL2+ with minimal effect on data signals. This latest


    Original     		PDF 30MHz)

    TPN3021

    Abstract: jedec package standards so8 ITU-T-K20 TPN302 VDE0878 VDE0433 tpn30
    Text: TPN3021 Tripolar overvoltage protection for network interfaces Features • Triple crowbar protection ■ Low capacitance ■ Low holding current: IH = 30 mA minimum ■ Surge current: – IPP = 200 A, 2/10 µs – IPP = 30 A, 10/1000 µs Main applications


    Original     		PDF TPN3021 TPN3021 jedec package standards so8 ITU-T-K20 TPN302 VDE0878 VDE0433 tpn30

    ITU-T-K20

    Abstract: jedec package standards so8 tpn302
    Text: TPN3021 Tripolar overvoltage protection for network interfaces Features • Triple crowbar protection ■ Low capacitance ■ Low holding current: IH = 30 mA minimum ■ Surge current: – IPP = 200 A, 2/10 µs – IPP = 30 A, 10/1000 µs Main applications


    Original     		PDF TPN3021 TPN3021 ITU-T-K20 jedec package standards so8 tpn302

    OP492

    Abstract: OP492GP OP292GP OP492P OP292 OP-292 OP292GS OP492GS OP492G
    Text: a FEATURES Single-Supply Operation: 4.5 V to 33 V Input Common-Mode Includes Ground Output Swings to Ground High Slew Rate: 3 V/␮s High Gain Bandwidth: 4 MHz Low Input Offset Voltage High Open-Loop Gain No Phase Inversion Low Cost APPLICATIONS Disk Drives


    Original     		PDF OP292/OP492 OP292 14-Lead OP-292 OP492 OP297 MO-095-AB OP492 OP492GP OP292GP OP492P OP292 OP-292 OP292GS OP492GS OP492G