KAS 34 Search Results

16f550

Abstract: 16F54
Contextual Info: A Advance information •■ AS4LC1M16F5 3.3V l M x 16 CM O S DRAM fast page mode Features • 1024 refresh cycles, 16 ms refresh interval • Organization: 1,048,576 words x 16 bits • High speed - KAS-only o r CAS-before-KAS refresh • Read-modify-write

Contextual Info: Preliminary information •■ AS4C1M 16F5 A 5V 1M x 16 C M O S DRAM fast page mode Features • 1024 refresh cycles, 16 m s refresh interval • O rganization: 1,048 ,5 7 6 w ords x 16 bits • H igh speed - KAS-only or CAS-before-KAS refresh • R ead-m odify-w rite

Contextual Info: Advance information •■ AS4VC256K16E0 A 2.5V 256KX 16 CMOS DRAM EDO Features • 512 refresh cycles, 8 ms refresh interval • Organization: 262,144 w ords x 16 bits - RAS-only or CAS-before-RAS refresh or self refresh • H ig h speed - 45/60 ns KAS access tim e

Contextual Info: 1 L E D 6 D D o t O T * 1 M 6 D A o T t R I X MODEL : SSD-D9696DLM Seoul Semiconductor Co., Ltd. 148-29,Kas an-Dong, KeumChun-Ku, Seou1, Kor ea TEL : 82-2-3281-6269 FAX :82-2-858-5537 Web-site : www.seoul-semicon.co.kr Q-00-0553 Rev,0 1.GENERAN DESCRIPTION

5 x 8 led dot matrix

Abstract: 8 x 8 led dot matrix MAX280 SSD-D9696DLM 16-DOT 5 x 7 led dot matrix
Contextual Info: 16D o t* 16Dot LED DOT MATRIX MODEL : SSD-D9696DLM Seoul Semiconductor Co., Ltd. 148-29,Kas an-Dong, KeumChun-Ku, Seou1, Kor ea TEL : 82-2-3281-6269 FAX :82-2-858-5537 Web-site : ww.seoul-semicon.co.kr Q -0 0 -0 5 5 3 R e v ,0 1.GENERAN DESCRIPTION The SSD-D9696DLM(Cathode Column) is a high reliability epoxy molded 96*96m m 04.6 dot

KAS 34

Abstract: MO23 MO-23 CX52 THM368020SG60
Contextual Info: TOSHIBA THM368020S/SG-60/70 8,388,608 WORD X 36 BIT DYNAMIC RAM MODULE DESCRIPTION The THM368020 is a 8,388,608 word by 36 bit dynamic RAM module which is assembled with 16 TC5117400J devices and 8 TC514100ASJ devices on the printed circuit board. The THM368020 can be used

kx-5t

Abstract: KAS 34
Contextual Info: TOSHIBA THM362060AS/ASG -60/70/80 2,097,152 WORD X 36 BIT DYNAMIC RAM MODULE DESCRIPTION The THM362060A is a 2,097,152 word by 36 bit dynamic RAM module which is assembled with 18 TC514400ASJ devices on the printed circuit board. This module is optimized for applications which require

"EN 61326-1"

Abstract: transducer 61326 "Pressure transducer" ppt SD Specification
Contextual Info: SUPPLIER DRAWING SD SPECIFICATION H O N E Y W E L L SOLID STATE ELECTRONICS CENTER MINNEAPOLIS, MINNESOTA 55441 Federal Cage Code No. 22024844 34168 TITLE: PPTS, CE SUPPLEMENT, EN 61326-1 PREPARED BY G. Monzo ORIGINATOR APPROVED BY T. Stratton DATE 7/18/01

THM3220C0AS

Abstract: KAS 34
Contextual Info: TOSHIBA THM3220C0AS/ASG -70/80 2,097,152 WORD X 32 BIT DYNAMIC RAM MODULE DESCRIPTION The THM3220C0A is a 2,097,152 word by 32 bit dynamic RAM module which is assembled with 4 TC5118160AJ device on the printed circuit board. This module can be as well used as 4,194,304 word by 16 bit

Contextual Info: A S 4 C 2 5 6K 1 6F 0 Il 5V 2 5 6 K x 1 6 C M O S DRAM fast page m ode Features • Organization: 262,144 w ords by 16 bits • High speed - 2 5 /3 0 /3 5 /5 0 ns RAS access time - 12/1 6 /1 8 /2 5 ns column address access time - 7 /1 0 /1 0 /1 0 ns CAS access time

Contextual Info: 8 IO 36.00± Z .35 3.3 PC CARD HEADER V O L T K E Y I N G OP TI ON 2 . 1(0 (.1 0 6) P IN P IN PER P C M C IA 71878 IT E M NUMBER *34 - REF. P IN *l II P IN *68 T A I L L EN G T H DIM ' P ' 1 0 . 3 (1 .0 12 ) ST A N D OFF DIM H E IG H T 'C ' THREADED IN S E R T

Contextual Info: SCV64 User Manual http://www.silicon360.com The information in this document is subject to change without notice and should not be construed as a commitment by Silicon360. While reasonable precautions have been taken, Silicon360 assumes no responsibility for any errors that may appear in this document.

Contextual Info: AS4C256K16E0 5V 256Kx 16 CMOS DRAM EDO Features • Refresh - 5 1 2 refresh cycles, 8 m s refresh interval - RAS-only o r CAS-before-RAS refresh o r self-refresh - Self-refresh o p tio n is available for n e w g en eratio n device • O rganization: 2 6 2 ,1 4 4 w o rd s x 16 bits

TC514260B

Abstract: tc514273 TC514260BJ
Contextual Info: TOSHIBA TC514260BJ/BFT-70/80 262,144 WORD X 16 BIT DYNAMIC RAM DESCRIPTION The TC514260BJ/BFT is the new generation dynamic RAM organized 262,144 word by 16 bit. The TC514260BJ/BFT utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit

AS4C1M16F5

Contextual Info: Preliminary information •■ AS4C1M16F5 1 5V lM x 16 CM OS DRAM fast page mode Features • O rg an izatio n : 1 ,0 4 8 ,5 7 6 w o rd s • H ig h speed X • 1024 refresh cycles, 16 m s refresh in terv al 16 bits - K A S -only o r C A S-before-K A S r e f r e s h

thm321000AS

Contextual Info: TOSHIBA THM321000AS/ASG -60/70/80 1,048,576 WORD X 32 BIT DYNAMIC RAM MODULE DESCRIPTION The THM 321000A is a 1,048,576 w ord by 32 bit dynam ic RAM m odule w hich is assem bled with eight TC514400A SJ devices on the printed circuit board. This m odule can be used as well as 2,097,152 word by 16

Contextual Info: BA THM361070AS/ASG -60/70/80 1,048,576 WORD X 36 BIT DYNAMIC RAM MODULE DESCRIPTION The TH M 361070AS/ASG is a 1,048,576 w ord by 36 bit dynam ic RA M m odule which is assem bled with 8 TC514400SJ devices on the printed circuit board. T his module is optim ized for applications which require

AFT 518

Abstract: A518 A531 a539 KAS 34
Contextual Info: TOSHIBA TC5116180AJ/AFT-60/70/-80 1,048,576 WORD X 18 BIT DYNAMIC RAM DESCRIPTION The TC5116180AJ/AFT is the new generation dynamic RAM organized 1,048,576 word by 18 bit. The TC5116180AJ/AFT utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit

TC5118160AJ

Contextual Info: TOSHIBA THM3220CQAS/ASG -70/80 2,097,152 WORD X 32 BIT DYNAMIC RAM MODULE DESCRIPTION The THM3220C0A is a 2,097,152 word by 32 bit dynamic RAM module which is assembled with 4 TC5118160AJ device on the printed circuit board. This module can be as well used as 4,194,304 word by 16 bit

Contextual Info: SUPPLIER DRAWING SD SPECIFICATION H O N E Y W E L L SOLID STATE ELECTRONICS CENTER MINNEAPOLIS, MINNESOTA 55441 Federal Cage Code No. 22024843 34168 TITLE: PPTS, CE DoC, EN 61326-1 PREPARED BY G. Monzo ORIGINATOR APPROVED BY T. Stratton DATE 7/18/01 DATE

DDA010

Abstract: H17j KDS 1M
Contextual Info: NEWBRIDGE MICROSYSTEMS SSE D • bSäfllOl 0 D G 0 7 3 1 3 ■ CA91C015 VMEbus DATA ADDRESS REGISTER FILE DARF T -5 2 -3 3 -S 5 Complete VMEbus address and data Interface, exeept buffers Decoupling of CPU and VMEbus Sustained 25-30 Megabyte/second VMEbus

Contextual Info: TOSHIBA TC 5 118 18 Q AJ/AFT-70 /8 0 1,048,576 WORD X 18 BIT DYNAMIC RAM DESCRIPTION The TC5118180A J/FT is the new generation dynam ic RAM organized 1,048,576 w ord by 18 bit. The TC5118180AJ/AFT utilizes Toshiba’s CM OS silicon gate process technology as well as advanced circuit

kds 4.000

Abstract: KDS 8.000 KDS 4.000 MHZ SR 7231 VAM03 VAM-03 KDS 40 Mhz clock A24D16 DMA24 VMEbus
Contextual Info: Üfc« FEBRUARY 1990 TM CA91C015 VMEbus DATA ADDRESS REGISTER FILE DARF Complete VMEbus address and data Interface, except buffers Decoupling of CPU and VMEbus Sustained 25-30 Megabyte/second VMEbus transfer rate Selectable atomic or decoupled mode Programmable A32 and A24 slave Image bases

B1531

Abstract: R0201 H5301
Contextual Info: IMPEDANCE Z 25 MHz 100 MHz 300 MHz Nominal (REF^ 109 ft Minimum - ft 210 Q 168 O 347 Q - Q Frequency Z vs. FR EQ U EN C Y (REF. ONLY) SEE DETAIL ”A ” SECTION A - A FREQUENCY (MHz) UNCONTROLLED DOCUMENT AG ILEN T E4991A Impedanca/MateiM Anatyzar HP 16092A Test Fixture REP# 3338