L-34 HDSL Search Results

rd2n

Abstract: RD5A B7010 SK70708PE B7004 SK70704 SK70707 SK70708 g991 B7003
Contextual Info: DATA SHEET AUGUST 1998 SK70704/SK70707 or SK70708 Revision 4.0 1168 Kbps HSDL Data Pump Chip Set General Description Features The HDSL Data Pump is a chip set consisting of the following two devices: • SK70704 Analog Core Chip ACC • SK70707 (68-pin PLCC) or SK70708 (44-pin PLCC)

Z3340

Abstract: cd 3313 eo D3118
Contextual Info: DATA SHEET JANUARY 1998 Revision 2.0 LXP710 HDSL Framer/Mapper for 1168 kbps Applications • fUiVmI I O r mN Bf A MI flyb ti n MJ m W aVH ffv I» The L X P710 is a complete HDSL framer/mapper that m ul­ tiplexes and demultiplexes a framed or unframed 2.048

FT-X1

Abstract: bt8953 BT8952 BT8921 FTX1
Contextual Info: llOìi System Overview — - HDSL System with Bt8921 The Bt8921 HDSL Analog Front End AFE) is an integral component of Brooktree's HDSL chipset. System performance of the chipset allows 2-pair T l, 2-pair

Contextual Info: System Overview HDSL System with Bt8921 The Bt8921 HDSL Analog Front End AFE is an integral component of Brooktree's HDSL chipset. System performance of the chipset allows 2-pair T l, 2-pair E l, and 3-pair E l transmission. The major building blocks of a typical HDSL

81256

Contextual Info: AUGUST 1997 Revision 3.0 SK70704/SK70707 or SK70708 1168 kbps HDSL Data Pump Chip Set Features The HDSL Data Pump is a chip set consisting o f the fol­ lowing tw o devices: • SK70704 Analog Core Chip ACC • SK70707 (68-pin PLCC) or SK70708 (44-pin PLCC)

PAIRGAIN HDSL PINOUT

Abstract: rcv101 DFE equalizer error filter SCRAMBLE Bt8952EPJ
Contextual Info: Preliminary Information This docum ent contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. Bt8952 HDSL Transceiver The Bt8952 is a High-Bit-Rate Digital Subscriber Line H D SL Transceiver su p ­

Contextual Info: DATA S H E E T M AY 1999 Revision 2.1 LXP710 HDSL Framer/Mapper for 1168 kbps Applications General Description The LXP710 is a complete HDSL framer/mapper that multiplexes and demultiplexes a framed or unframed 2.048 Mbps E l data stream onto two 1168 kbps H DSL lines. The LXP710 also

DI 392

Abstract: SK70704 SK70706 SK70706PE RD5A CK25M
Contextual Info: DATA SHEET AUGUST 1998 Revision 3.0 SK70704/SK70706 784 Kbps HDSL Data Pump Chip Set General Description Features The HDSL Data Pump is a chip set consisting of the following two devices: • SK70704 Analog Core Chip ACC • SK70706 HDSL Digital Transceiver (HDX)

Contextual Info: B U R R -B R O W N AFE1115 HDSL/MDSL ANALOG FRONT END WITH VCXO FEATURES • • • • • COMPLETE HDSL ANALOG INTERFACE • E1, T1 AND MDSL OPERATION • VCXO AND VCXO CONTROL CIRCUITRY +5V ONLY 5V or 3.3V Digital SCALEABLE DATA RATE 300mW POWER DISSIPATION

GR-1089

Abstract: RS-423 VSB06P05LCI VSB06P12LCI
Contextual Info: 05062 VSB06P05LCI thru Only One Name Means ProTek’Tion VSB06P12LCI LOW CAPACITANCE TVS ARRAY APPLICATIONS ✔ RS-232 and RS-423 Data Lines ✔ T1/E1 & T3/E3 ✔ ATM Circuit Interfaces ✔ ADSL/HDSL & ISDN Interfaces ✔ V.34/V.90 ✔ Cable Modem Intra-Structure Protection

GR-1089

Abstract: RS-423 VSB06P05LCI VSB06P12LCI 06016
Contextual Info: 05062 VSB06P05LCI thru VSB06P12LCI LOW CAPACITANCE TVS ARRAY APPLICATIONS ✔ RS-232 and RS-423 Data Lines ✔ T1/E1 & T3/E3 ✔ ATM Circuit Interfaces ✔ ADSL/HDSL & ISDN Interfaces ✔ V.34/V.90 ✔ Cable Modem Intra-Structure Protection IEC COMPATIBILITY EN61000-4

Contextual Info: 05015 VSB06P05LCI thru VSB06P12LCI LOW CAPACITANCE TVS ARRAY APPLICATIONS ✔ RS-232 and RS-423 Data Lines ✔ T1/E1 & T3/E3 ✔ ATM Circuit Interfaces ✔ ADSL/HDSL & ISDN Interfaces ✔ V.34/V.90 ✔ Cable Modem Intra-Structure Protection IEC COMPATIBILITY EN61000-4

diode MARKING v34

Abstract: rectifier diode of piv 12v 12V PIV RATING DIODE diodes with piv greater than 18 HDSL 120 RS-423 VSB06P05LCI VSB06P12LCI
Contextual Info: 05062 VSB06P05LCI thru VSB06P12LCI . . . engineered solutions for the transient environment LOW CAPACITANCE ISOLATED VSIP TVS DIODE ARRAY APPLICATIONS ✔ RS-232, and RS-423 Data Lines ✔ T1/E1 & T3/E3 ✔ ATM Circuit Interface ✔ ADSL/HDSL & ISDN Interface

Contextual Info: Line Interface 56kbps Modem Transformer • Inductors and Transformers for xDSL Applications • nt magnetics nuvotem HDSL, SDSL, VDSL Interface Transformers SECTION 11 Common Mode Interface Chokes • Transformers for Broadband Access Sales & Marketing, Design and Manufacturing Facilities

L8921

Abstract: BT8921ESS BT8952 ETR15 L8921-C Bi8921 RXWT1
Contextual Info: Preliminary Information This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. Bt8921 HDSL Analog Front End AFE Brooktree’s HDSL Analog Front End (AFE) greatly reduces the size and cost of an

B7003

Abstract: SK70704 SK70707 SK70708 28pin echo IC 3.3 B7007
Contextual Info: DATA SHEET AUGUST 1997 Revision 3.0 SK70704/SK70707 or SK70708 1 1168 kbps HDSL Data Pump Chip Set General Description Features The HDSL Data Pump is a chip set consisting of the following two devices: • SK70704 Analog Core Chip ACC • SK70707 (68-pin PLCC) or SK70708 (44-pin PLCC)

E1784

Contextual Info: B U R R -B R O W N E AFE1115 1 HDSL/MDSL ANALOG FRONT END WITH VCXO • +5V ONLY 5V or 3.3V Digital FEATURES • SCALEABLE DATA RATE • COMPLETE HDSL ANALOG INTERFACE • 300mW POWER DISSIPATION • E1, T1 AND MDSL OPERATION • 56-PIN SSOP • VCXO AND VCXO CONTROL CIRCUITRY

Bi8921

Contextual Info: BU RR -BRO W N d [ AFE1103 1 HDSL/M DSL ANALOG FRONT END FEATURES DESCRIPTION • COMPLETE ANALOG INTERFACE • T1, E1, AND MDSL OPERATION • CLOCK SCALEABLE SPEED Burr-Brown’s Analog Front End greatly reduces the size and cost of an H D SL or M D SL system by provid­

4148NX

Abstract: SK70741 SK70742 Viterbi Decoder 500E 80C51 SK70740 SK70742QE e.oc3 EOC17
Contextual Info: DATA SHEET MARCH 2000 Revision 2.3 SK70742 HDSL2 FEC/Framer General Description Features Level One’s HDSL2 chip set provides synchronous fullduplex transmission over a single twisted pair. The SK70742 combines the functions of HDSL2 Frame Mapping and Forward Error Correction FEC in a single

PDS-1331A

Contextual Info: AFE1104E B U R R -B R O W N E ] HDSL/MDSL ANALOG FRONT END FEATURES DESCRIPTION • • • • Burr-Brown’s Analog Front End greatly reduces the size and cost o f an HDSL or M DSL system by provid­ ing all of the active analog circuitry needed to connect

Contextual Info: B U R R -B R O W N AFE1203 2Mbps, Single Pair HDSL ANALOG FRONT END FEATURES • • • • • • • • E1/T1 SINGLE PAIR 2B1Q OPERATION COMPLETE ANALOG INTERFACE 385mW POWER DISSIPATION PROGRAMMABLE POWER 48-LEAD SSOP PACKAGE SCALEABLE DATA RATE OPERATION FROM 2.3Mbps TO 160kbps

321ST5

Contextual Info: AUGUST 1998 Revision 3.0 SK70704/SK70706 784 Kbps HDSL Data Pump Chip Set e s c n p tio n The HDSL Data Pump is a chip set consisting of the following two devices: • SK70704 Analog Core Chip ACC • SK70706 HDSL Digital Transceiver (HDX) The HDSL Data Pump is a 2-wire transceiver which

Contextual Info: B U R R - BROW N AFE1105 HDSL/MDSL ANALOG FRONT END FEATURES DESCRIPTION • • • • Burr-Brown’s Analog Front End greatly reduces the size and cost of an HDSL or MDSL system by provid­ ing all of the active analog circuitry needed to connect the Metalink MtH1210B HDSL digital signal proces­

Contextual Info: B U R R -B R O W N AFE1205 2Mbps, Single Pair HDSL ANALOG FRONT END FEATURES • • • • • • • • E1/T1 SINGLE PAIR 2B1Q OPERATION COMPLETE ANALOG INTERFACE 385mW POWER DISSIPATION PROGRAMMABLE POWER 48-LEAD SSOP PACKAGE SCALEABLE DATA RATE OPERATION FROM 2.3Mbps TO 160kbps