LBGA Search Results

19575

Contextual Info: PC board footprint Philips Semiconductors Footprint information for reflow soldering of LBGA324 package SOT728-1 Hx P P Hy see detail X Generic footprint pattern Refer to the package outline drawing for actual layout solder land solder paste deposit solder land plus solder paste

BV 17168

Abstract: IFFT 208M D950 LBGA132 MPC850 STLC1510 STLC1511 STLC1512 G922
Contextual Info: STLC1510 NorthenLite G.lite DMT Transceiver PRODUCT PREVIEW • ATM transport ■ Forward Error correction & interleaving ■ Framing & de-framing ■ DMT modulation and demodulation ■ Start-up & showtime control processing LBGA132 ORDERING NUMBER: STLC1510

Contextual Info: Package outline LBGA256: plastic low profile ball grid array package; 256 balls; body 17 x 17 x 1.05 mm A B D SOT740-1 ball A1 index area A E A2 A1 detail X C e1 1/2 e e ∅v M C A B b y y1 C ∅w M C T R e P N M L K J e2 H 1/2 e G F E D C B A ball A1 index area

Contextual Info: PreLIMINARY Information L9D112G80BG4 1.2 Gb, DDR - SDRAM Integrated Module IMOD Benefits FEATURES DDR SDRAM Data Rate = 200, 250, 266, and 333 Mbps Package: • 25mm x 25mm, Encapsulated Laminate Ball Grid array (LBGA), 219 balls, 1.27mm pitch. 2.5V ±0.2V Core Power supply

Contextual Info: ZL30153 Synchronous Ethernet Network Synchronization DPLL Short Form Data Sheet February 2012 Features • • Ordering Information ZL30153GGG 100 Pin LBGA ZL30153GGG2 100 Pin LBGA* Supports requirements of ITU-T G.8262 for Synchronous Ethernet Equipment Slave Clocks

ZL50011QCG1

Abstract: GR-1244-CORE MS-026 ZL50011
Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features • March 2006 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation Ordering Information 160 Pin LQFP Trays 144 Ball LBGA Trays 160 Pin LQFP* Trays, Bake & Drypack

Contextual Info: ZL30161 Network Synchronization Clock Translator Short Form Data Sheet May 2013 Features • Ordering Information ZL30161GDG2 144 Pin LBGA Trays Fully compliant SEC G.813 and EEC (G.8262) flexible rate conversion digital phase locked loop (DPLL) Pb Free Tin/Silver/Copper

Contextual Info: ZL30230 Four Channel Universal Clock Generator Short Form Data Sheet January 2012 Features • • • Ordering Information Generates clock signals at power-up per user defined custom OTP One Time Programmable configuration ZL30230GGG 100 Pin LBGA ZL30230GGG2 100 Pin LBGA*

IF33

Abstract: of161 MT90826 MT90826AG MT90826AL MT90826AL1 MT90826AV STI10 STo26
Contextual Info: MT90826 Quad Digital Switch Data Sheet Features • January 2006 4,096 x 4,096 channel non-blocking switching at 8.192 or 16.384 Mbps Ordering Information MT90826AL MT90826AG MT90826AV MT90826AL1 MT90826AG2 160 Pin MQFP Trays 160 Ball PBGA Trays 144 Ball LBGA

256 ball bga

Contextual Info: Number of Input Streams Number of Output Streams Stratum Level # of Reference Inputs Microprocessor Interface Intel / Motorola Data Bus Width (bit) ZL50010 512 x 512 16 16 4E 2 6 M 16 160 pin LQFP, 144 ball LBGA ZL50011 512 x 512 16 16 4 1 6 M 16 160 pin LQFP, 144 ball LBGA

Contextual Info: Package outline LBGA260: plastic low profile ball grid array package; 260 balls; body 19 x 19 x 1 mm D B SOT882-1 A ball A1 index area A E A2 A1 detail X C e1 e ∅v ∅w b 1/2 e M M C A B C y y1 C V U T e R P N M L K J H G F E D C B A ball A1 index area e2

int6400

Abstract: INT1400 atheros int6400 atheros int1400 INT1400TR atheros INT6400TR INT6400TR homeplug av Intellon INT6400 IC
Contextual Info: T E C H N I C A L P R O D U C T B R I E F INT6400/INT1400 HomePlug AV Chip Set Features INT6400 • HomePlug AV MAC & PHY plus ADC and DAC in a 196-contact LBGA, Pb-free package • MII Host & PHY interface • Supports1024/256/64/16/8-QAM, QPSK, BPSK and ROBO Modulation Schemes

Contextual Info: Package outline LBGA228: plastic low profile ball grid array package; 228 balls SOT1097-1 A B D ball A1 index area E A2 A A1 detail X e1 1/2 e e ∅v ∅w b T R P N M L K J H G F E D C B A ball A1 index area e2 1/2 e 1 2 3 4 5 6 7 8 9 11 13 15 10 12 14 16

Contextual Info: ZL30362 IEEE 1588 & Synchronous Ethernet Packet Clock Network Synchronizer Short Form Data Sheet April 2013 Features Ordering Information ZL30362GDG2 144 Pin LBGA • Four independent clock channels • Frequency and Phase Sync over Packet Networks • Trays

LBGA196

Abstract: LBGA-196 MO-192 sot879
Contextual Info: Package outline Philips Semiconductors LBGA196: plastic low profile ball grid array package; 196 balls; body 15 x 15 x 1 mm A B D SOT879-1 ball A1 index area A A2 A1 E detail X C e1 e 1/2 e y y1 C ∅v M C A B b ∅w M C P N e M L K J H e2 G 1/2 e F E D C

JEDEC MO 224

Abstract: LBGA224 MO-192 sot809
Contextual Info: PDF: 2003 May 23 Philips Semiconductors Package outline SOT809-1 LBGA224: plastic low profile ball grid array package; 224 balls; body 17 x 17 x 1.05 mm A B D ball A1 index area A E A2 A1 detail X C e1 e 1/2 ∅v M b e ∅w M y1 C C A B C y T R P e N M L K

lbgn

Contextual Info: 256 LBGA/LBGN PACKAGE OUTLINE SINGLE LID MOLDED MATRIX MOLDED & SAWED Min Nominal Max Remark A 1.10 - 1.50 Overall Package Height A1 0.25 - 0.50 Standoff A2 0.49 - 0.75 Mold Thickness D 16.80 17.00 17.20 X Board Length D1 - 15.00 - X Distance Between End Ball Centers

Contextual Info: Up To 4 K Switching Matrix TDM/TSI SWITCHES VOICE/DATA Packaging M 8 40 pin PDIP, 44 pin PLCC, 44 pin QFP MT89L80 256 x 256 8 8 M 8 44 pin PLCC, 48 pin SSOP MT89L85 256 x 256 8 8 M 8 44 pin PLCC, 48 pin SSOP ZL50012 512 x 512 16 16 Per-Stream M 16 160 pin LQFP, 144 ball LBGA

LBGA256

Abstract: MO-192 SOT740-1 sot740
Contextual Info: PDF: 2002 Jan 09 Philips Semiconductors Package outline LBGA256: plastic low profile ball grid array package; 256 balls; body 17 x 17 x 1.05 mm A B D SOT740-1 ball A1 index area A E A2 A1 detail X C e1 1/2 e e ∅v M C A B b y y1 C ∅w M C T R e P N M L K

MS-026

Abstract: ZL50012 philips e3 STO11 ci 116h 4094m
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection

atheros int6400

Abstract: int6400 INT1400 atheros int1400 homeplug av atheros INT6400TR homeplug av INT6400 IC INT1400TR intellon
Contextual Info: P R O D U C T B R I E F INT6400/INT1400 HomePlug AV Chip Set Features INT6400/INT1400 Chip Set: • HomePlug AV MAC & PHY plus ADC and DAC in a 196-contact LBGA, Pb-free package • MII Host & PHY interface • Supports1024/256/64/16/8-QAM, QPSK, BPSK and ROBO Modulation Schemes

Contextual Info: PC board footprint NXP Semiconductors Footprint information for reflow soldering of LBGA324 package SOT728-2 Hx P P Hy see detail X Generic footprint pattern Refer to the package outline drawing for actual layout solder land solder paste deposit solder land plus solder paste

MO-192

Abstract: LBGA208 sot774
Contextual Info: PDF: 2002 May 14 Philips Semiconductors Package outline LBGA208: plastic low profile ball grid array package; 208 balls; body 17 x 17 x 1.05 mm A B D SOT774-1 ball A1 index area A E A2 A1 detail X C e1 1/2 e e ∅v M C A B b y y1 C ∅w M C T R e P N M L K

pec 824

Contextual Info: ZL30361 IEEE 1588 and Synchronous Ethernet Packet Clock Network Synchronizer Short Form Data Sheet May 2013 Features • • • Ordering Information ZL30361GDG2 144 Pin LBGA Frequency and Phase Sync over Packet Networks Frequency accuracy performance for WCDMAFDD, GSM, LTE-FDD and femtocell applications