LCC 16 PIN PACKAGE Search Results

CERAMIC LEADLESS CHIP CARRIER

Abstract: CERAMIC LEADLESS CHIP CARRIER LCC 52 PACKAGE CERAMIC LEADLESS CHIP CARRIER LCC LCC-16C-F01
Contextual Info: LEADLESS CHIP CARRIER 16 PAD CERAMIC LCC-16C-F01 EIAJ code : ∗QFN016-G-S250-1 16-pad ceramic LCC Lead pitch 50mil Package width x package length 250 × 250mil Sealing method Frit seal LCC-16C-F01 *Shape of PIN NO.1 INDEX : Subject to change without notice.

Contextual Info: 76 CY7C276 16K x 16 Reprogrammable PROM Features Functional Description • 0.8-micron CMOS for optimum speed/power • High speed — 25-ns access time • 16-bit-wide words • Three programmable chip selects • Programmable output enable • 44-pin PLCC and 44-pin LCC packages

CY7C276-25JC

Abstract: CY7C276 CY7C276-25HC CY7C276-30JC
Contextual Info: 1CY7C276 CY7C276 16K x 16 Reprogrammable PROM Features Functional Description • 0.8-micron CMOS for optimum speed/power • High speed — 25-ns access time • 16-bit-wide words • Three programmable chip selects • Programmable output enable • 44-pin PLCC and 44-pin LCC packages

LCC 18 Pin Package

Abstract: 26PIN 26-PIN MB81C466-10 20-PIN
Contextual Info: Section 2 CMOS DRAMs — At a Glance Maximum Acc««« Tlm« n« Capacity Package Option« 262144 bits (262144wx 1b) 16-pin 18-pin Plastic Plastic DIP LCC 262144 bits (65536w x 4b) 18-pin 18-pin 20-pin 18-pin 18-pin 20-pin 26-pin Plastic Ceramic Plastic Plastic

Contextual Info: p yp: v « *1 X X CY7C276 - 16Kx 16 Reprogrammable PROM Features Functional Description • The CY7C276 is a high-performance 16K-word by 16-bit CMOS PROM. It is available in a 44-pin PLCC/CLCC and a 44-pin LCC packages, and is 100% reprogrammable in w in­

AS4LC1M16

Contextual Info: AS4LC1M16 883C 1 MEG x 16 DRAM AUSTIN SEMICONDUCTOR, INC. PRELIMINARY DRAM 1 MEG x 16 DRAM 3.3V, EDO PAGE MODE, OPTIONAL EXTENDED REFRESH AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • MIL-STD 883 • SMD Planned 44/50-Pin SOJ/LCC/Gull Wing

W184-5

Abstract: D10DE
Contextual Info: CY7C273 PRELIMINARY CYPRESS SEMICONDUCTOR Features • 0.8-micron CMOS for optimum speed/ power • High speed — 40 ns access time • 16-bit-wide words • 40-pin, 600-mil-wide DIP packages • 44-pin PLCC and 44-pin LCC packages • Direct replacement for EPROMs

0-32k

Abstract: CERAMIC PIN GRID ARRAY 120 pins 6A14
Contextual Info: £ n jS ¡^ DPV32X16A Dense-Pac Microsystems, Inc. 0 _ 32K X 16 UVEPROM PGA MODULE PRELIMINARY DESCRIPTION: The DPV32X16A is a 40-pin Pin Grid Array PGA consisting of two 32K X 8 UVEPROM devices in ceramic LCC packages surface mounted on a co-fired

Contextual Info: CY7C276 PRELIMINARY CYPRESS SEMICONDUCTOR • 0.8-micron CMOS for optimum speed/ power • High speed — 25 ns access time • • • • 16-bit-wide words Three programmable chip selects Programmable output enable 44-pin PLCC and 44>pin LCC packages • 100% reprogrammable in windowed

Contextual Info: DPV64X16A Dense-Pac Microsystems, Inc. 64KX 16 UVEPROM PGA MODULE O PRELIMINARY DESCRIPTION: The DPV64X16A is a 40-pin Pin Grid Array PGA consisting of two 64K X 8 U VEPRO M devices in ceramic LCC packages surface mounted on a co-fired ceramic substrate with matched thermal coefficients.

CY7C276-25JC

Abstract: C276 CY7C276 CY7C276-25HC C2761 CY7C276-30JC c2762 C2767
Contextual Info: 1CY 7C27 6 CY7C276 16K x 16 Reprogrammable PROM Features Functional Description • 0.8-micron CMOS for optimum speed/power The CY7C276 is a high-performance 16K-word by 16-bit CMOS PROM. It is available in a 44-pin PLCC/CLCC and a 44-pin LCC packages, and is 100% reprogrammable in windowed packages. The memory cells utilize proven EPROM

Contextual Info: ASÎÿ Aì 's‘f h •f 'p o p ‘ Si DRAM srvr . ' ' Ö83C , 1 * »RAM 256K X 1 DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • MIL-STD-883 18-Pin LCC 16-Pin DIP (D-2) FEATURES m |U 2 18 17 *A8 16 Q 4 15 A6 NC AZ 7

Contextual Info: DPS8X16A Dense-Pac Microsystems, Inc. HIGH SPEED 8K X 16 CMOS SRAM PCA MODULE O PRELIMINARY DESCRIPTION: The DPS8X16A is a 40-pin Pin Grid Array PGA consisting of two 8K X 8 SRAM devices in ceramic LCC packages surface mounted on a co-fired ceramic substrate with matched thermal coefficients.

A54LC1M16

Abstract: S6DR AS4LC1W16
Contextual Info: DRAM 1 MEG x 16 DRAM 3.3V, EDO PAGE MODE, OPTIONAL EXTENDED REFRESH AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • MIL-STD 883 • SMD Planned 44/50-Pin SOJ/LCC/Gull Wing 450mil FEATURES • JEDEC- and industry-standard xl6 timing, functions,

a841

Abstract: 36A6
Contextual Info: DPV128X16A □PM Dense-Pac Microsystems. Inc. ^ H IG H SPEED 128K X 16 UVEPROM PGA M O D U LE PRELIMINARY DESCRIPTION: The DPV128X16A is a 40-pin Pin Grid Array PGA consisting o f tw o 128K X 8 UVEPROM devices in ceramic LCC packages surface mounted on a co-fired

CY7C276-25JC

Abstract: CY7C276 C2768 tCKA
Contextual Info: CY7C276 CYPRESS SEMICONDUCTOR Features • 0.8-micron CMOS for optimum speed/ power • High speed for commercial and military — 25-ns access time • • • • 16-bit-wide words Three programmable chip selects Programmable output enable 44-pin PLCC and 44-pin LCC

LC 7258

Contextual Info: CY7C276 CYPRESS SEMICONDUCTOR Features • 0.8-micron CMOS for optimum speed/ power • High speed for commercial and military — 25-ns access time • • • • 16-bit-wide words Three programmable chip selects Programmable output enable 44-pin PLCC and 44-pin LCC

MT4C1259

Contextual Info: MT4C1259 883C 256K x 1 DRAM AUSTIN SEMICONDUCTOR, INC. DRAM 256K x 1 DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • MIL-STD-883 18-Pin LCC 16-Pin DIP (D-2) 2 /W/E /R/A/S NC AD AZ MARKING • Timing 100ns access 120ns access

CY7B333

Contextual Info: I UOOO. O /O U /9 U Revision: Tuesday, December 22,1992 - CY7B333B PRELIMINARY CYPRESS " SEMICONDUCTOR General-Purpose Synchronous BiCMOS PLD • Available in 28-pin, 300-mil PDIP, cerDIP, PLCC, and LCC packages • Programmable security bit Features • 16 I/O macrocells, each having:

Contextual Info: « ~ DPV64X16A 64K X 16 UVEPROM PGA MODULE Dense-Pac Microsystems, Inc. 0 PRELIMINARY D ESC R IPT IO N : The DPV64X16A is a 40-pin Pin Grid Array (PGA consisting of two 64K X 8 U V E P R O M devices in ceramic LCC packages surface mounted on a co-fired

Contextual Info: AS4C1259 883C 256K X 1 DRAM AUSTIN SEM IC O N D U C TO R , INC. « p DRAM 256K x 1 DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • MIL-STD-883 18-Pin LCC 16-Pin DIP (D-2) FEATURES • Industry standard pinout and timing

66171-300

Abstract: 66171 K2710 4N49 Micropac* 66171
Contextual Info: 66171 PROTON RADIATION TOLERANT, QUAD CHANNEL, HERMETIC 20 PIN LCC, OPTICALLY COUPLED ISOLATOR OPTOELECTRONIC PRODUCTS DIVISION 04/16/2009 Features: Applications: • • • • • • • • • • • High Reliability Base lead provided for conventional transistor

Contextual Info: SHM-49 □MñSL High Speed, 0.01% Hybrid Sample/Hold PRELIMINARY PRODUCT DA TA MECHANICAL DIMENSIONS FEATURES • • • • 16 MHz small signal bandwidth Small 8 pin DIP or LCC package 200 nanoseconds maximum acquisition time to 0.01% 100 nanoseconds maximum sample/hold settling time

magnetic sensor circuit diagram

Abstract: differential magnetoresistive sensor HMC1052L HMC1052 "Magnetic Sensor" Designing With Magnetoresistive Sensors magnetoresistive honeywell sensor Magnetic Sensing magnetic sensor
Contextual Info: HMC1052L Advance Information SENSOR PRODUCTS 2-AXIS MAGNETIC SENSOR Features • · · · · · · Miniature 16-Pin LCC Package 3 x 3 x 0.9mm Two AMR Bridges in One Package Wide Field Range of +/- 6 Gauss 1.0 mV/V/gauss Sensitivity High Accuracy Compassing