LGA 2011 SOCKET PIN DIAGRAM Search Results

NRF51422

Contextual Info: N5 ANT SoC Module Series ANT Operation when loaded with S210 SoftDevice • 79 selectable RF channels (2402 to 2480 MHz)  Simple to complex network topologies: peer-to-peer, star, tree, star-to-star and more  Broadcast, acknowledged, and burst data

LG1152

Abstract: ACTEL CCGA 624 mechanical A54SXA LG1272 CQ352
Contextual Info: v5.3 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg

LGA 2011 Socket diagram

Abstract: senju laser solder wire transistors catalog HLQFP 176 Package drawing FeNi42 national marking code senju jet printer smd transistor code 314 Weibull SOP EIAJ TYPE II ED-7402-1 microfocus x-ray
Contextual Info: User’s Manual Renesas Semiconductor Package Mount Manual www.renesas.com Rev.1.01 Mar 2011 Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please

ACTEL CCGA 624 mechanical

Abstract: LG1152 RTAX2000S ACTEL burn-in RTAX250S LGA 2011 Socket diagram RTAX2000 ACTEL CCGA 1152 mechanical cg624 RTAX1000S
Contextual Info: v5.4 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg

CQ352

Abstract: antifuse
Contextual Info: v2.1 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

SILEX

Abstract: CQ352
Contextual Info: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

socket lga 1156 pinout

Abstract: intel i5 MOTHERBOARD pcb CIRCUIT diagram i3 desktop MOTHERBOARD CIRCUIT diagram 115XLM LGA 1156 PIN OUT diagram LGA 1150 Socket PIN diagram Intel socket 1156 PIN LAYOUT Socket 1156 VID pinout 1155 socket REFLOW profile lga socket 1155
Contextual Info: Intel Core i5-600, i3-500 Desktop Processor Series, Intel® Pentium® Desktop Processor 6000 Series and LGA1156 Socket Thermal/Mechanical Specifications and Design Guidelines January 2011 Document Number:322912-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,

RTAX2000

Abstract: rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3
Contextual Info: v5.1 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg

Synplify tmr

Abstract: 2965A ACTEL CCGA 1152 mechanical RTAX2000 CGS624 A54SX16 TM-3015 CCGA RTAX1000S-SL rtax250s
Contextual Info: v5.3 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg

LGA 478 SOCKET PIN LAYOUT

Abstract: RTAX2000
Contextual Info: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg

56 pin edac connector

Abstract: RTAX1000 edac 96 pin edac connector 292 CCGA
Contextual Info: v2.1 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

MIL-PRF-38535 appendix a

Abstract: RTAX2000S rtax250s diode smd f6 sl TDC 1809 cga 624 624-CCGA RTAX2000 ACTEL CCGA to FBGA Adapter RTAX1000S
Contextual Info: v5.4 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg

56 pin edac connector

Abstract: PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical
Contextual Info: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

CQ352-FPGA

Abstract: RTAX1000s-cq RTAX4000S RTAX2000 RTAX2000S-CQ352 FPGA Application Note schematic 324 CDB 455 C34 rtax4000 AP3433
Contextual Info: v4.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

RTAX2000S

Abstract: CDB 455 C34 RTAX1000S-CQ352 RTAX2000S-CQ352
Contextual Info: v3.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

624 CCGA

Abstract: CCGA ACTEL CCGA 624 mechanical
Contextual Info: v2.2 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

APXW005A0X3-SRZ

Contextual Info: Data Sheet April 26, 2011 9-36V ProLynxTM 5A: Non-Isolated DC-DC Power Modules 9Vdc –36Vdc input; 3Vdc to 18Vdc output; 5A to 2.5A Output Current Features RoHS Compliant Applications • Compliant to RoHS EU Directive 2002/95/EC Z versions • Compatible in a Pb-free or SnPb reflow environment

Contextual Info: Data Sheet March 17, 2011 9-36V ProLynxTM 5A: Non-Isolated DC-DC Power Modules 9Vdc –36Vdc input; 3Vdc to 18Vdc output; 5A to 2.5A Output Current Features RoHS Compliant Applications • Compliant to RoHS EU Directive 2002/95/EC Z versions • Compatible in a Pb-free or SnPb reflow environment

APXW003

Abstract: GCM32ER71E106KA42
Contextual Info: Data Sheet October 17, 2011 9-36V ProLynxTM: Non-Isolated DC-DC Power Modules 9Vdc –36Vdc input; 3Vdc to 18Vdc output; 3A to 1.5A Output Current Features • Compliant to RoHS EU Directive 2002/95/EC Z versions • Compatible in a Pb-free or SnPb reflow environment

Lineage Power ProLynx

Abstract: APXW003
Contextual Info: Preliminary Data Sheet April 11, 2011 9-36V ProLynxTM: Non-Isolated DC-DC Power Modules 9Vdc –36Vdc input; 3Vdc to 18Vdc output; 3A to 1.5A Output Current Features • Compliant to RoHS EU Directive 2002/95/EC Z versions • Compatible in a Pb-free or SnPb reflow environment

apxw005

Contextual Info: Data Sheet October 17, 2011 9-36V ProLynxTM 5A: Non-Isolated DC-DC Power Modules 9Vdc –36Vdc input; 3Vdc to 18Vdc output; 5A to 2.5A Output Current Features RoHS Compliant Applications • Compliant to RoHS EU Directive 2002/95/EC Z versions • Compatible in a Pb-free or SnPb reflow environment

Contextual Info: Data Sheet May 26, 2011 9-36V ProLynxTM 5A: Non-Isolated DC-DC Power Modules 9Vdc –36Vdc input; 3Vdc to 18Vdc output; 5A to 2.5A Output Current Features RoHS Compliant Applications • Compliant to RoHS EU Directive 2002/95/EC Z versions • Compatible in a Pb-free or SnPb reflow environment

RTAX2000

Abstract: RTAX2000S RTAX1000SL rtax250 RTAX250SL RTAX4000SL RTAX1000 RTAX-S RTAX1000S-SL rtax250s
Contextual Info: Rev ision 13 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)

Contextual Info: Data Sheet January 13, 2011 Pico TLynxTM 6A: Non-Isolated DC-DC Power Modules 2.4 – 5.5Vdc input; 0.6Vdc to 3.63Vdc output; 6A Output Current Features EZ-SEQUENCETM RoHS Compliant EZ-SEQUENCETM Applications • Compliant to RoHS EU Directive 2002/95/EC Z