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LOADMOD Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: 74ACT11867 SYNCHRONOUS 8-BIT UP/DOWN BINARY COUNTER WITH ASYNCHRONOUS CLEAR S C A S 1 7 8 - D 3 9 9 0 , D E C E M B E R 1991 - R E V IS E D A P R I L 1 9 9 3 Inputs Are TTL-Voltage Compatible Asynchronous Clear Fully Independent Clock Circuit Simplifies Use |
OCR Scan |
74ACT11867 500-mA | |
TI BINARY DATE CODE
Abstract: BQ20Z80-V101 BQ2940
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bq20z80-V101 SLUS625C bq29312 TI BINARY DATE CODE BQ2940 | |
Contextual Info: iPEM 2.4 Gb SDRAM-DDR2 AS4DDR232M72PBG 32Mx72 DDR2 SDRAM iNTEGRATED Plastic Encapsulated Microcircuit FEATURES BENEFITS DDR2 Data rate = 667, 533, 400 Available in Industrial, Enhanced and Military Temp Package: • 255 Plastic Ball Grid Array PBGA , 25 x 32mm |
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AS4DDR232M72PBG 32Mx72 AS4DDR232M72PBG | |
TAG 8926
Abstract: Lpg 899 SDC 2921 TF 6221 HEN LED display 12V+RELAY+1+C/8 pin ic sdc 3733
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MCIMX31 MCIMX31L MCIMX31RM IOIS16 IOIS16/WP MCIMX31L TAG 8926 Lpg 899 SDC 2921 TF 6221 HEN LED display 12V+RELAY+1+C/8 pin ic sdc 3733 | |
unseal BQ2084
Abstract: unseal BQ20z80 103AT bq20z80 bq20z80DBT bq20z80DBTR bq29312 bq29400 VIT140 0x2673
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bq20z80 SLUS625B bq29312 unseal BQ2084 unseal BQ20z80 103AT bq20z80DBT bq20z80DBTR bq29400 VIT140 0x2673 | |
TMS320DM357Contextual Info: TMS320DM357 DVEVM v2.05 Getting Started Guide Literature Number: SPRUGH0 December 2008 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any |
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TMS320DM357 511458-0001B | |
Contextual Info: TMS320F28377D, TMS320F28376D www.ti.com SPRS880 – DECEMBER 2013 TMS320F2837xD Dual-Core Delfino Microcontrollers Check for Samples: TMS320F28377D, TMS320F28376D 1 TMS320F2837xD Dual-Core Delfino MCUs 1.1 Features • Dual-Core Architecture – Two TMS320C28x™ 32-Bit CPUs |
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TMS320F28377D, TMS320F28376D SPRS880 TMS320F2837xD TMS320C28xâ 32-Bit | |
74ACT11867
Abstract: BOX655303
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OCR Scan |
74ACT11867 SCAS178 D3990, 500-mA 74ACT11867 D10371D BOX655303 | |
AF200 microcontroller programmer
Abstract: SKwizard AF200 fujitsu STARTERkit mb90f MB90F520 minato 1890A J6 marking code MB90523 MB90570 QFP120
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QFP120 i19200 -SK16 -i19200 -i19200 -FF0000 FFA000 AF200 microcontroller programmer SKwizard AF200 fujitsu STARTERkit mb90f MB90F520 minato 1890A J6 marking code MB90523 MB90570 | |
Contextual Info: M24LR16E-R Dynamic NFC/RFID tag IC with 16-Kbit EEPROM, energy harvesting, I²C bus and ISO 15693 RF interface Datasheet - production data Contactless interface • ISO 15693 and ISO 18000-3 mode 1 compatible • 13.56 MHz ±7k Hz carrier frequency SO8 MN |
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M24LR16E-R 16-Kbit 64-bit 32-bity DocID018932 | |
Contextual Info: LRI2K 2048 bit EEPROM TAG IC at 13.56 MHz with 64-bit UID and KILL code, ISO15693 and ISO18000-3 Mode 1 compliant Preliminary Data Features • ISO15693 standard fully compliant ■ ISO18000-3 mode 1 standard fully compliant ■ 13.56 MHz ±7k Hz carrier frequency |
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64-bit ISO15693 ISO18000-3 | |
Contextual Info: SRI512 13.56-MHz short-range Contactless memory chip with 512-bit EEPROM and Anti-Collision functions Preliminary Data Feature summary • ISO 14443 - 2 Type B Air Interface Compliant ■ ISO 14443 - 3 Type B Frame Format Compliant ■ 13.56MHz Carrier Frequency |
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SRI512 56-MHz 512-bit 56MHz 847kHz 64-bit 40-Year | |
PC133 registered reference design
Abstract: MT48LC32M8A2P
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256MB 512MB 168-PIN PC100- PC133-compliant 168-pin, 256MB MT8LSDT3264A 64x64AG PC133 registered reference design MT48LC32M8A2P | |
Contextual Info: White Electronic Designs W3DG64126V-D2 PRELIMINARY* 1GB - 2x64Mx64, SDRAM UNBUFFERED FEATURES DESCRIPTION PC100 and PC133 compatible The W3DG64126V is a 2x64Mx64 synchronous DRAM module which consists of sixteen 64Mx8 SDRAM components in TSOP II package and one 2K EEPROM |
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W3DG64126V-D2 2x64Mx64, PC100 PC133 W3DG64126V 2x64Mx64 64Mx8 | |
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ISO10373-6
Abstract: SRT512 ISO14443-2 MI b11 transistor A4t 46 diode a4t transistor A4t ISO14443 ISO14443-3 7816-6 AM1
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SRT512 512-bit 64-bit 40-year ISO10373-6 SRT512 ISO14443-2 MI b11 transistor A4t 46 diode a4t transistor A4t ISO14443 ISO14443-3 7816-6 AM1 | |
a42 a331
Abstract: omap 310 TMS320C55x CSL USB VLYNQ C6000 OMAP5912 SPRU375 TMS320C6000 stt a227 a44 a331
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OMAP5912 SPRU816 accorda-24 Index-11 a42 a331 omap 310 TMS320C55x CSL USB VLYNQ C6000 OMAP5912 SPRU375 TMS320C6000 stt a227 a44 a331 | |
Contextual Info: 74ACT11867 SYNCHRONOUS 8-BIT UP/DOWN BINARY COUNTER WITH ASYNCHRONOUS CLEAR SCAS178A − DECEMBER 1991 − REVISED FEBRUARY 1998 D Inputs Are TTL-Voltage Compatible D Asynchronous Clear D Fully Independent Clock Circuit Simplifies D D D D DW PACKAGE TOP VIEW |
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74ACT11867 SCAS178A 500-mA | |
R5F56218
Abstract: R5F56216 DTC142EE R5F562N8 R0E000010KCE00 R5F562T7 R5F562T6 R5F562TA E1 Emulator R0E000010KCE00 RX62T
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E1/E20 RX600 RX610, RX621, RX62N RX62T 20Emulator R20UT0399EJ0300 REJ10J2090-0200) R5F56218 R5F56216 DTC142EE R5F562N8 R0E000010KCE00 R5F562T7 R5F562T6 R5F562TA E1 Emulator R0E000010KCE00 | |
VC5471Contextual Info: TMS320VC5471 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS180C June 2001 – Revised December 2002 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments |
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TMS320VC5471 SPRS180C VC5471 | |
soc fuse
Abstract: SLUS681
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bq20z80-V102 SLUS681 bq29312A soc fuse SLUS681 | |
AT697
Abstract: AT697F AT697E 4426D ASR16
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32-bit 24-bit 33MHz 32/64-bit 4426D AT697 AT697F AT697E ASR16 | |
MB87P2020
Abstract: MB87J2120 MB91360 SAA7111
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MB91F361/2 MB87J2120 MB87P2020 SAA7111 MB87P2020 MB87J2120 MB91360 | |
W3DG6463V-D2Contextual Info: White Electronic Designs W3DG6463V-D2 PRELIMINARY* 512MB – 2x32Mx64 SDRAM UNBUFFERED FEATURES DESCRIPTION Burst Mode Operation Auto and Self Refresh capability LVTTL compatible inputs and outputs Serial Presence Detect with EEPROM Fully synchronous: All signals are registered on the positive |
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W3DG6463V-D2 512MB 2x32Mx64 W3DG6463V 32Mx8 W3DG6463V-D2 | |
Contextual Info: SRIX4K 13.56MHz Short Range Contactless Memory Chip with 4096 bit EEPROM, Anti-Collision and Anti-Clone Functions FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ISO 14443 - 2 Type B Air Interface Compliant ISO 14443 - 3 Type B Frame Format |
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56MHz 847kHz 64-bit 4096-bit 40-Year |