LV139 Search Results

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396F – APRIL 1998 – REVISED OCTOBER 2002 LV139A . . . J OR W PACKAGE LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 LV139A . . . FK PACKAGE

A115-A

Abstract: C101 SN54LV139A SN74LV139A 74LV139A
Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396C – APRIL 1998 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Designed Specifically for High-Speed Memory Decoders and Data-Transmission

Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396 – APRIL 1998 D D D description The ’LV139A devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation. These devices are designed for highperformance memory-decoding or data-routing

texas instruments package marking

Abstract: lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS
Contextual Info: TEXAS INSTRUMENTS Informational Notification for the Symbolization Change of Select Devices in ‘NS’ Package November 5, 1998 Abstract Texas Instruments Inc., Standard Linear and Logic products SLL is in the process of converting topside symbolization on a few select devices in the ‘NS’ package to show the ‘74’ prefix before the

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: LV139A, LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

7054F

Abstract: BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557
Contextual Info: INDEX General General Information Semiconductor Packages Sales Locations Microcontroller Microcontroller General MultiChipModules Smart Card Micro. Overview Micro. Shortform Micro. Hardware Manual Micro. Program. Manual Micro. Application Notes LCD Controller / Driver

74HCT139

Contextual Info: TECHNICAL DATA LV139 Dual 2-to-4 line decoder/demultiplexer; inverting N SUFFIX PLASTIC The LV139 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HCT139. LV139 is dual 2-to-4 line decoder/demultiplexer . This device has two independent decoders, each accepting two binary

SN74 schmitt trigger

Abstract: SDYU001 SN54LV00A SN54LV02A SN54LV04A SN54LV05A SN54LV08A SN54LV14A SN54LV32A SN54LV74A
Contextual Info: LVC and LV LowĆVoltage CMOS Logic Data Book 1998 Logic Products General Information LVC Gates and MSI LVC Octals LVC Widebus LVC 3.3-V to 5-V Translators and Cable Drivers LV Gates and MSI LV Octals Application Reports Mechanical Data LVC and LV Low-Voltage CMOS Logic

Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396F – APRIL 1998 – REVISED OCTOBER 2002 LV139A . . . J OR W PACKAGE LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 LV139A . . . FK PACKAGE

LV139A

Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396F – APRIL 1998 – REVISED OCTOBER 2002 LV139A . . . J OR W PACKAGE LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 LV139A . . . FK PACKAGE

Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396G – APRIL 1998 – REVISED JULY 2003 LV139A . . . J OR W PACKAGE LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 LV139A . . . FK PACKAGE

SN74LV139A

Abstract: SN54LV139A
Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396B – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports

Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: LV139A, LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: LV139A, LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

A115-A

Abstract: C101 SN54LV139A SN74LV139A 74LV139A
Contextual Info: LV139A, LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396C – APRIL 1998 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Designed Specifically for High-Speed Memory Decoders and Data-Transmission

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: LV139A, LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: LV139A, LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: LV139A, LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

lvc16244

Abstract: BC240 2sk3174 CBT1G125 LV2GT14A HC32 Hitachi HA13557A transistor 2SC1162 H8 hitachi programming manual 30204SP
Contextual Info: HITACHI ELECTRONIC COMPONENTS DATABOOK 2003 INDEX General Informations Multi Perpose Products Safety Considerations Hitachi Semiconductor Package Databook HITACHI Sales Locations Diodes Microcontroller Microcontroller General Microcontroller Overview List