LVDS IP Search Results

MAX9174

Abstract: MAX9174ETB MAX9174EUB MAX9175 MAX9175ETB MAX9175EUB MAX9176
Contextual Info: 19-2827; Rev 0; 4/03 670MHz LVDS-to-LVDS and Anything-to-LVDS 1:2 Splitters Features ♦ 1.0ps RMS Jitter (max) at 670MHz The MAX9174 has a fail-safe LVDS input and LVDS outputs. The MAX9175 has an anything differential input (CML/LVDS/LVPECL) and LVDS outputs. The outputs

Contextual Info: 19-2757; Rev 0; 1/03 670MHz LVDS-to-LVDS and Anything-to-LVDS 2:1 Multiplexers Features ♦ 1.0ps RMS Jitter (max) at 670MHz The MAX9176 has fail-safe LVDS inputs and an LVDS output. The MAX9177 has “anything” differential inputs (CML/LVDS/LVPECL) and an LVDS output. The output

MAX9176

Contextual Info: 19-2757; Rev 0; 1/03 670MHz LVDS-to-LVDS and Anything-to-LVDS 2:1 Multiplexers Features ♦ 1.0ps RMS Jitter (max) at 670MHz The MAX9176 has fail-safe LVDS inputs and an LVDS output. The MAX9177 has “anything” differential inputs (CML/LVDS/LVPECL) and an LVDS output. The output

HDMI TO VGA MONITOR PINOUT

Abstract: HDMI to vga pinout china DVD player card circuit diagram serdes hdmi optical fibre mp3 player circuit diagram by using msp430 PL-2303 SN75179 application VGA TO HDMI PINOUT meter-bus HDMI cat5
Contextual Info: TM Technology for Innovators Interface Selection Guide 4Q 2006 2 ➔ Interface Selection Guide Table of Contents Introduction 3 LVDS, xECL, CML . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Multipoint-LVDS M-LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

Contextual Info: Voltage Controlled Temperature Compensated Crystal Oscillators MERCURY VCTCXO, VMW5762D Series, “W” Family LVDS Outputs Since 1973 Features:  Bridge the gap between non-compensated LVDS clock and OCXO with LVDS outputs  Low cost, low jitter. Footprint is compatible with 5x7 LVDS clock.

lvds vhdl

Abstract: VHDL Bidirectional Bus IBUFDS_LVDS_25 cable lvds LVDS 31 pin UG012
Contextual Info: R LVDS I/O LVDS I/O Introduction Low Voltage Differential Signaling LVDS is a very popular and powerful high-speed interface in many system applications. Virtex-II Pro I/Os are designed to comply with the IEEE electrical specifications for LVDS to make system and board design easier. With the

Contextual Info: Revised January 2002 FIN1101 LVDS Single Port High Speed Repeater General Description Features This single port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. It accepts and outputs LVDS levels

Contextual Info: Revised January 2002 FIN1104 LVDS 4 Port High Speed Repeater General Description Features This 4 port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The FIN1104 accepts and outputs LVDS levels

FIN1101

Abstract: FIN1101K8 FIN1101M M08A high current circuit diagram
Contextual Info: Preliminary Revised September 2001 FIN1101 LVDS Single Port High Speed Repeater Preliminary General Description Features This single port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. It accepts and outputs LVDS levels

Contextual Info: Preliminary Revised December 2001 FIN1101 LVDS Single Port High Speed Repeater Preliminary General Description Features This single port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. It accepts and outputs LVDS levels

"differential input" common mode voltage LVDS

Contextual Info: Preliminary Revised January 2002 FIN1101 LVDS Single Port High Speed Repeater Preliminary General Description Features This single port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. It accepts and outputs LVDS levels

Contextual Info: IDT5T93GL10 2.5V LVDS 1:10 GLITCHLESS CLOCK BUFFER TERABUFFER II INDUSTRIAL TEMPERATURE RANGE 2.5V LVDS 1:10 GLITCHLESS CLOCK BUFFER TERABUFFER II IDT5T93GL10 FEATURES: DESCRIPTION: • • • • • • • • The IDT5T93GL10 2.5V differential clock buffer is a user-selectable differential input to ten LVDS outputs . The fanout from a differential input to ten LVDS

Contextual Info: Revised January 2002 FIN1102 LVDS 2 Port High Speed Repeater General Description Features This 2 port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The FIN1102 accepts and outputs LVDS levels

Contextual Info: Revised January 2002 FIN1102 LVDS 2 Port High Speed Repeater General Description Features This 2 port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The FIN1102 accepts and outputs LVDS levels

Contextual Info: Preliminary Revised January 2002 FIN1104 LVDS 4 Port High Speed Repeater Preliminary General Description Features This 4 port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The FIN1104 accepts and outputs LVDS levels

IDT5T93GL161

Contextual Info: IDT5T93GL161 2.5V LVDS, 1:16 GLITCHLESS CLOCK BUFFER TERABUFFER II General Description Features The IDT5T93GL161 2.5V differential clock buffer is a user-selectable differential input to sixteen LVDS outputs. The fanout from a differential input to sixteen LVDS outputs reduces

Contextual Info: Preliminary Revised December 2001 FIN1102 LVDS 2 Port High Speed Repeater Preliminary General Description Features This 2 port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The FIN1102 accepts and outputs LVDS levels

Contextual Info: IDT5T93GL06 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II INDUSTRIAL TEMPERATURE RANGE 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II DESCRIPTION: FEATURES: • • • • • • • • • • • • IDT5T93GL06 The IDT5T93GL06 2.5V differential clock buffer is a user-selectable differential input to six LVDS outputs . The fanout from a differential input to six LVDS

Contextual Info: IDT5T93GL06 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II INDUSTRIAL TEMPERATURE RANGE 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II DESCRIPTION: FEATURES: • • • • • • • • • • • • IDT5T93GL06 The IDT5T93GL06 2.5V differential clock buffer is a user-selectable differential input to six LVDS outputs . The fanout from a differential input to six LVDS

Contextual Info: IDT5T93GL06 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II INDUSTRIAL TEMPERATURE RANGE 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II DESCRIPTION: FEATURES: • • • • • • • • • • • • IDT5T93GL06 The IDT5T93GL06 2.5V differential clock buffer is a user-selectable differential input to six LVDS outputs . The fanout from a differential input to six LVDS

IDT5T93GL02

Contextual Info: IDT5T93GL02 2.5V LVDS 1:2 GLITCHLESS CLOCK BUFFER TERABUFFER II INDUSTRIAL TEMPERATURE RANGE 2.5V LVDS 1:2 GLITCHLESS CLOCK BUFFER TERABUFFER II DESCRIPTION: FEATURES: • • • • • • • • • • • IDT5T93GL02 The IDT5T93GL02 2.5V differential clock buffer is a user-selectable differential input to two LVDS outputs . The fanout from a differential input to two LVDS

IDT5T93GL06

Contextual Info: IDT5T93GL06 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II INDUSTRIAL TEMPERATURE RANGE 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II DESCRIPTION: FEATURES: • • • • • • • • • • • • IDT5T93GL06 The IDT5T93GL06 2.5V differential clock buffer is a user-selectable differential input to six LVDS outputs . The fanout from a differential input to six LVDS

5T93GL04

Abstract: IDT5T93GL04 G1114
Contextual Info: IDT5T93GL04 2.5V LVDS 1:4 GLITCHLESS CLOCK BUFFER TERABUFFER II INDUSTRIAL TEMPERATURE RANGE 2.5V LVDS 1:4 GLITCHLESS CLOCK BUFFER TERABUFFER II DESCRIPTION: FEATURES: • • • • • • • • • • • IDT5T93GL04 The IDT5T93GL04 2.5V differential clock buffer is a user-selectable differential input to four LVDS outputs . The fanout from a differential input to four LVDS

IDT5T93GL02

Contextual Info: IDT5T93GL02 2.5V LVDS 1:2 GLITCHLESS CLOCK BUFFER TERABUFFER II INDUSTRIAL TEMPERATURE RANGE 2.5V LVDS 1:2 GLITCHLESS CLOCK BUFFER TERABUFFER II DESCRIPTION: FEATURES: • • • • • • • • • • • IDT5T93GL02 The IDT5T93GL02 2.5V differential clock buffer is a user-selectable differential input to two LVDS outputs . The fanout from a differential input to two LVDS