LXT6051 Search Results

Contextual Info: Datasheet JUNE 1999 Revision 2.0 LXT6051 STM-170 SDH Overhead Terminator General Description The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0 51Mb/s and STM-1 (155Mb/s) multiplexers. It provides

E1 to fiber optic converter circuit

Abstract: stm-1 nortel BTS ericsson LP-UNEQ ERICSSON BTS product LP-UNEQ STM-1 HDB3 and CMI which is better Ericsson Base Station G-783 vc-4 digital cross connect
Contextual Info: LXT6051/LXT6251 SDH Chipset SDH and ITU Standards Application Note January 2001 Order Number: 249311-001 As of January 15, 2001, this document replaces the Level One document known as AN9801. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

ABBA

Abstract: LXT6051QE 9922H AU-AIS LXT6051 VC12 SLXT6051 LXT6251 W117
Contextual Info: Datasheet JUNE 1999 Revision 2.0 LXT6051 STM-1/0 SDH Overhead Terminator General Description Features The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0

LXT6155

Abstract: LXT6051 273590 optical regenerator
Contextual Info: LXT6051 STM-1/0 SDH Overhead Terminator Specification Update September 2001 Notice: The LXT6051 may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata are documented in

LXT6282

Abstract: DTD17 MTC11 MTC15 header 3x2 LXT6251A intel C96 74HC04 LXT344 25X2
Contextual Info: POWER.SCH POWER SUPPLIES MHICLK MHICLK J3 EXTCLKA EXTCLKA MHBCLK MHBCLK BNC-4 LXT6051.SCH J4 EXTCLKB MRESET EXTCLKB ALTSOH.sch BNC-4 MRESET MRESET J5 EXTCLKC MRESET EXTCLKC TSYNCCLKM TSYNCCLKM BNC-4 FPGA FOR SERIAL ACCESS TSYNCCLKM LXT6051A ORDERWIR.SCH TROWM

LXT6282

Abstract: JP15 adpll intel pdh e2 74AC04 motorola LXT6251A quad 74HC04 NOT GATE datasheet STM-1 JP16 LXT334
Contextual Info: LDB6x51 Evaluation Board for LXT6051, LXT6251A, and LXT6282 Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LDB6x51 Evaluation Board for LXT6051, LXT6251, and LXT6282 User Guide. Order Number: 249305-001

AU-AIS

Abstract: Digital Alarm Clock by using ttl LXT e2 LXT6251A marking cod A2 regenerator in optical D4D12 LXT6051 LXT6051QE SSI 7200
Contextual Info: LXT6051 STM-1/0 SDH Overhead Terminator Datasheet The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0 51Mb/s and STM-1 (155Mb/s) multiplexers. It provides micro-controller access for performance monitoring,

LXT6251A

Abstract: LXT6051 LXT6234 LXT6282 muldex G703 LXT380 TU12 6251A LXT625
Contextual Info: product brief Intel LXT6282 Digital Interface Product Description The Intel® LXT6282 digital interface is the telecommunication industry’s first octal E1 digital interface. It is the only solution to simultaneously address the widespread problems of jitter, wander,

40-pin male connector

Abstract: AMCC errata LXT6251A LXT6282 40 pin connector 40 PIN MALE CONNECTOR BNC connector led optical transceiver datasheet STM 1 STM-1 LXT334
Contextual Info: LDB6111 STM-1 Optical Board for use with the LDB6x51A Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LDB6111 STM-1 Optical Board for use with the LDB6x51A User Guide. Order Number: 249308-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

dtc12

Contextual Info: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E l PDH signals into SDH. The PDH side interfaces with E l LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard

Contextual Info: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.

MTC27

Abstract: 2x4 TTL demultiplexer 106 35K 045 226 35K AU-AIS Digital Alarm Clock by using ttl MTB 230 P03H GR-253-CORE IXF6151
Contextual Info: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.

LXT6155

Abstract: LXT6051
Contextual Info: LXT6155 — Mbps SONET/SDH/ ATM Transceiver Frequently Asked Questions January 2001 Order Number: 249394-001 As of January 15, 2001, this document replaces the Level One document known as LXT6155 -FAQs. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

IXF6151

Abstract: oasis GR-253-CORE LXT6051 TU12 G841 ANSI T1.105
Contextual Info: IXF6151 — 28 T1/E1 Universal Mapper Frequently Asked Questions January 2001 Order Number: 249392-001 As of January 15, 2001, this document replaces the Level One document known as IXF6151 - FAQs. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

MTC27

Abstract: 2x4 TTL demultiplexer Pentium MMX 166 Processor MTC13 KLM-1 DTC20 mtc10 VT1536 MTD23 MTD27
Contextual Info: Intel IXF6151 28 T1/E1 Mapper Datasheet ® The Intel IXF6151 performs asynchronous mapping and demapping of 28 T1 and/or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface. Further

2x4 TTL demultiplexer

Contextual Info: Intel IXF6151 28 T1/E1 Mapper Datasheet The Intel® IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus

IXF6151

Abstract: LXT6051 249309 intel date code format
Contextual Info: IXF6151 28 T1/E1 Mapper Specification Update January 2001 Notice: The IXF6151 may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this specification update.

X1HB

Abstract: MTC13 LXT625 131-G W J 50
Contextual Info: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper LXT General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard

DTC24

Abstract: AU-AIS MTC27 vc-4 digital cross connect 226 35K 2x4 TTL demultiplexer Digital Alarm Clock by ttl Digital Alarm Clock by using ttl P03H GR-253-CORE
Contextual Info: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.

nrz to hdb3

Abstract: LXT6282 E1 HDB3 249279 HDB3 to nrz intel datasheets for i9 microwave radio transmitter surface mount counter G704 LXT334
Contextual Info: LXT6282 Octal E1 Digital Interface with CRC-4 Monitoring and Jitter/Wander Suppression Datasheet LXT6282 is an eight-channel E1 digital interface. It integrates an E1 dejitter phase locked loop, an E1 retiming function and a CRC-4 monitor function for each E1 transmitter and a CRC-4

X1HB

Abstract: telecom bus DM9000 application Digital Alarm Clock by using ttl LXT6251A 001H LXT6051 MTD10 LXT6282 MTC11
Contextual Info: LXT6251A 21 E1 SDH Mapper Datasheet The LXT6251A 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom bus interface. Further processing by the companion