MARKING 2A SOT363 Search Results

Contextual Info: LESHAN RADIO COMPANY, LTD. General Purpose Transistors PNP Silicon LMBT3906TT1 3 FEATURE ƽSimplifies Circuit Design. ƽThis is a Pb-Free Device. 1 2 ORDERING INFORMATION Device LMBT3906TT1 Marking Shipping 2A 3000/Tape&Reel SC-89 MAXIMUM RATINGS Symbol Value

Contextual Info: LESHAN RADIO COMPANY, LTD. General Purpose Transistors PNP Silicon LMBT3906LT1G • Pb−Free Package May be Available. The G−Suffix Denotes a Pb−Free Lead Finish 3 ORDERING INFORMATION Device 1 Marking 2 Shipping LMBT3906LT1G 2A 3000/Tape & Reel LMBT3906LT3G

74LVC2G06DW-7

Contextual Info: 74LVC2G06 DUAL INVERTER WITH OPEN DRAIN OUTPUTS Description Pin Assignments The 74LVC2G06 is a dual inverter gate with open drain outputs. The device is designed for operation with a power SOT26 SOT363 are Future Products supply range of 1.65V to 5.5V. The input is tolerant to 5.5V

Contextual Info: 74LVC2G17 DUAL SCHMITT TRIGGER BUFFER Description Pin Assignments The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The SOT26 SOT363 are Future

dual inverter

Abstract: 74LVC2G04DW-7 Dual Inverter Gate
Contextual Info: 74LVC2G04 DUAL INVERTER GATE Description Pin Assignments The 74LVC2G04 is a dual inverter gate with standard pushpull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant SOT26 SOT363 are Future

74AUP2G3404GW

Contextual Info: 74AUP2G3404 Low-power buffer and inverter Rev. 1 — 22 August 2012 Product data sheet 1. General description The 74AUP2G3404 is a single buffer and single inverter. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall

Contextual Info: UESD6V8L5A6 Low Capacitance 5 Line ESD Protection Diode Array UESD6V8L5A6 SC70-6 / SC88 / SOT363 General Description The UESD6V8L5A6 of TVS array is designed to protect sensitive electronics from damage or latch-up due to ESD, for use in applications where board space is at a premium. It is unidirectional

Contextual Info: MA2403C10000000 P-Ch 20V Fast Switching MOSFETs General Description Product Summery The MA2403C1 is the highest performance trench P-ch MOSFETs with extreme high cell density , which provide excellent RDSON and gate charge for most of the small power switching and load

74LVC2GU04

Abstract: 74LVC2GU04GM 74LVC2GU04GV 74LVC2GU04GW sot363 marking DATE code
Contextual Info: 74LVC2GU04 Dual inverter Rev. 05 — 27 October 2009 Product data sheet 1. General description The 74LVC2GU04 provides two inverters. Each inverter is a single stage with unbuffered output. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of

transistor C639

Abstract: c639 transistor f423 F423 transistor f422 transistor f422 equivalent cx59 C640-10 f422 c640 transistor
Contextual Info: Marking Code Sorted by Type Type Package Marking Type Package Marking BA 592 BA 595 BA 597 BA 885 BA 892 BAL 74 BAL 99 BAR 14-1 BAR 15-1 BAR 16-1 BAR 17 BAR 60 BAR 61 BAR 63 BAR 63-02W BAR 63-03W BAR 63-04 BAR 63-04W BAR 63-05 BAR 63-05W BAR 63-06 BAR 63-06W

DSS4240Y

Contextual Info: DSS4240Y Features Mechanical Data • • • • • • • • • • Epitaxial Planar Die Construction Ideal for Low Power Amplification and Switching Complementary PNP Type Available DSS5240Y Ultra Small Surface Mount Package “Lead Free”, RoHS Compliant (Note 1)

Contextual Info: DSS5240Y 40V LOW VCE sat PNP SURFACE MOUNT TRANSISTOR Features Mechanical Data • • • • • • • • Epitaxial Planar Die Construction Ideal for Low Power Amplification and Switching Ultra Small Surface Mount Package “Lead Free”, RoHS Compliant (Note 1)

Contextual Info: DSS5240Y 40V LOW VCE sat PNP SURFACE MOUNT TRANSISTOR Features Mechanical Data • • • • • • • • Epitaxial Planar Die Construction Ideal for Low Power Amplification and Switching Ultra Small Surface Mount Package “Lead Free”, RoHS Compliant (Note 1)

Contextual Info: DSS4240Y Features Mechanical Data • • • • • • • • • • Epitaxial Planar Die Construction Ideal for Low Power Amplification and Switching Complementary PNP Type Available DSS5240Y Ultra Small Surface Mount Package “Lead Free”, RoHS Compliant (Note 1)

74LVC2G06

Abstract: 74LVC2G06GM 74LVC2G06GV 74LVC2G06GW JESD22-A114E
Contextual Info: 74LVC2G06 Inverters with open-drain outputs Rev. 03 — 21 May 2007 Product data sheet 1. General description The 74LVC2G06 provides two inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.

74LVC2G07GW

Abstract: 74LVC2G07GV 74LVC2G07 74LVC2G07GF 74LVC2G07GM JESD22-A114E
Contextual Info: 74LVC2G07 Buffers with open-drain outputs Rev. 04 — 21 May 2007 Product data sheet 1. General description The 74LVC2G07 provides two non-inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.

Contextual Info: MA2401C10000000 P-Ch 20V Fast Switching MOSFETs General Description Product Summery The MA2401C1 is the highest performance trench P-ch MOSFETs with extreme high cell density , which provide excellent RDSON and gate charge for most of the small power switching and load

Contextual Info: MA2404C1000000 N-Ch 20V Fast Switching MOSFETs General Description Product Summery The MA2404C1 is the highest performance trench N-ch MOSFETs with extreme high cell density , which provide excellent RDSON and gate charge for most of the small power switching and load

MARKING CODE YA

Contextual Info: 74LVC2G34 Dual buffer gate Rev. 03 — 21 March 2007 Product data sheet 1. General description The 74LVC2G34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of

74AUP2G0604GW

Contextual Info: 74AUP2G0604 Low-power inverting buffer with open-drain and inverter Rev. 1 — 23 November 2012 Product data sheet 1. General description The 74AUP2G0604 is a single inverting buffer with open-drain output and a single inverter. It features two input pins nA , an output pin (2Y) and an open-drain output pin

Contextual Info: MA2520C10000000 Dual N-Ch 20V Fast Switching MOSFET s General Description Product Summery The MA2520C1 is the highest performance trench N-ch MOSFETs with extreme high cell density , which provide excellent RDSON and gate charge for most of the small power switching and load

Contextual Info: 74AUP2G3407 Low-power single buffer; single buffer with open-drain Rev. 1 — 18 October 2013 Product data sheet 1. General description The 74AUP2G3407 is a single buffer and a single buffer with open-drain output. It features two input pins nA , an output pin (1Y) and an open-drain output pin (2Y).

Contextual Info: 74AUP2G07 Low-power dual buffer with open-drain output Rev. 01 — 21 November 2006 Product data sheet 1. General description The 74AUP2G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

74LVC2G34

Abstract: 74LVC2G34GF 74LVC2G34GM 74LVC2G34GV 74LVC2G34GW JESD22-A114E
Contextual Info: 74LVC2G34 Dual buffer gate Rev. 04 — 20 July 2007 Product data sheet 1. General description The 74LVC2G34 provides two buffers. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.