MC100EL Search Results

100EL91

Abstract: MC100EL91 MC100EL91DW MC100EL91DWR2 MC100LVEL91
Contextual Info: MC100EL91 3.3V / 5VĄTriple LVPECL / PECL Input to -5V ECL Output Translator The MC100EL91 is a triple LVPECL / PECL input to ECL output translator. The device receives standard or low voltage differential PECL signals, determined by the VCC supply level, and translates them

AND8020

Abstract: EL90 MC100EL90 MC100EL90DW MC100EL90DWR2 100EL90
Contextual Info: MC100EL90 -3.3V / -5VĄTriple ECL Input to PECL Output Translator The MC100EL90 is a triple ECL to PECL translator. The device receives either –3.3 V or –5 V differential ECL signals, determined by the VEE supply level, and translates them to standard +5 V differential PECL

KEL04

Abstract: HL04 HEL04 e104 MC100EL04 MC10EL04 HL-04
Contextual Info: MC10EL04, MC100EL04 5VĄECL 2ĆInput AND/NAND The MC10EL/100EL04 is a 2-input AND/NAND gate. The device is functionally equivalent to the E104 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E104, the EL04 is ideally suited for those

100EL91

Abstract: MC100EL91 MC100LVEL91
Contextual Info: MC100EL91 5 V Triple PECL Input to −5 V ECL Output Translator Description The MC100EL91 is a triple PECL input to ECL output translator. The device receives standard voltage differential PECL signals, determined by the VCC supply level, and translates them to differential

KV05

Abstract: KVL05 MC100EL05 MC100LVEL05 MC100LVEL05MNR4G
Contextual Info: MC100LVEL05 3.3V ECL 2-Input Differential AND/NAND Description The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3 V supply voltage. With propagation delays and output transition times equivalent to the EL05, the LVEL05 is ideally

100EL30

Abstract: MC100EL30 MC100EL30DW
Contextual Info: MC100EL30 5V ECL Triple D Flip−Flop with Set and Reset The MC100EL30 is a triple master−slave D flip−flop with differential outputs. Data enters the master latch when the clock input is LOW and transfers to the slave upon a positive transition on the

MC100EL59

Abstract: MC100EL59DW MC100EL59DWR2 AND8020
Contextual Info: MC100EL59 5VĄECL Triple 2:1 Multiplexer The MC100EL59 is a triple 2:1 multiplexer with differential outputs. The output data of the multiplexers can be controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device useful for both data path and random

KEL07

Abstract: HL-07 E107 MC100EL07 MC10EL07 hl07 IC HEL07
Contextual Info: MC10EL07, MC100EL07 5VĄECL 2ĆInput XOR/XNOR The MC10EL/100EL07 is a 2-input XOR/XNOR gate. The device is functionally equivalent to the E107 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E107, the EL07 is ideally suited for those

100EL56

Abstract: MC100EL56 MC100EL56DW MC100EL56DWR2
Contextual Info: MC100EL56 5V ECL Dual Differential 2:1 Multiplexer The MC100EL56 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple VBB pins are provided to ease AC coupling input signals.

DL140

Abstract: MC100EL05 MC100LVEL05 LVEL05
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 2ĆInput Differential AND/NAND MC100LVEL05 The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3V supply voltage. With propagation delays and output transition

751D-04

Abstract: DL140 MC100EL59 MC100LVEL59 DM 1265
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple 2:1 Multiplexer MC100LVEL59 MC100EL59 The MC100LVEL59 is a triple 2:1 multiplexer with differential outputs. The MC100EL59 is pin and functionally equivalent to the MC100LVEL59 but is specified for operation at the standard 100E ECL voltage supply.

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA ^4 Divider MC10EL33 MC100EL33 The MC10EL/100EL33 is an integrated +4 divider. The differential clock inputs and the V b b allow a differential, single-ended or AC coupled interface to the device. If used, the V b b output should be bypassed to ground with a

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Differential Receiver MC10EL16 MC100EL16 The MC10EL7100EL16 is a differential receiver. The device is functionally equivalent to the E116 device with higher performance capabilities. With output transition times significantly faster than the E116

Contextual Info: M OTOROLA SEMICONDUCTOR TECHNICAL DATA TTL to Differential PECL Translator MC10ELT20 MC100ELT20 The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA TTL to Differential PECL Translator MC10ELT20 MC100ELT20 The MC1OELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of

Contextual Info: M OTOROLA SEMICONDUCTOR TECHNICAL DATA Differential PECL to TTL Translator MC10ELT21 MC100ELT21 The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information TTL to Differential PECL/Differential PECL to TTL Translator MC10ELT28 MC100ELT28 The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 4-lnput OR/NOR MC10EL01 MC100EL01 The MC10EL/100EL01 is a 4-input OR/NOR gate. The device is functionally equivalent to the E101 device with higher performance capabilities. With propagation delays and output transition times

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple D Flip-Flop With Set and Reset MC100LVEL30 M C100EL30 The MC100LVEL30 is a triple master-slave D flip flop with differential outputs. The MC100EL30 is pin and functionally equivalent to the MC100LVEL30 but is specified for operation at the standard 100E ECL

7252 motorola

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Differential PECL to TTL Translator MC10ELT21 MC100ELT21 The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of the

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple 2:1 M ultiplexer MC100LVEL59 MC100EL59 The MC100LVEL59 is a triple 2:1 multiplexer with differential outputs. The MC100EL59 is pin and functionally equivalent to the MC100LVEL59 but is specified for operation at the standard 100E ECL voltage supply. The

MC100EL32

Abstract: MC10EL32 AZ100EL32 AZ100EL32D AZ10EL32 AZ10EL32D
Contextual Info: DATA SHEET AZ10EL32 AZ100EL32 ARIZONA MICROTEK, INC. ÷2 Divider FEATURES • • • • • • 510ps Propagation Delay 3.0GHz Toggle Frequency High Bandwidth Output Transitions 75kΩ Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor MC10EL32 & MC100EL32

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual TTL to Differential PECL Translator MC10ELT22 MC100ELT22 The MC10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 4:1 Differential M ultiplexer MC10EL57 MC100EL57 The MC10/100EL57 is a fully differential 4:1 multiplexer. By leaving the SEL1 line open pulled LOW via the input pulldown resistors the device can also be used as a differential 2:1 multiplexer with SELO input