MELEXIS MLX80104 Search Results

KLQ-DAA-000-RE

Abstract: Melexis MLX80104 LIN protocol J2602 MLX80105 internal structure OF ROM ISO7637 RAM192 MLX80104/5
Contextual Info: MLX80104/5 IO4 IO6 SW6 SW7 VS SW8 26 25 24 23 22 21 AWD IREF 2 20 SW9 SW5 3 19 IO7 SW4 4 18 IO0 SW3 5 17 GNDD TO 6 16 GNDL TI1 7 15 LIN 9 11 12 13 14 SW2 SW1 SW0 IO1 TI0 8 o Baud rate up to 19.2 kBaud o Frame processing o Low interrupt load to the application

Contextual Info: MLX80104/5 IO4 IO6 SW6 SW7 VS SW8 26 25 24 23 22 21 AWD IREF 2 20 SW9 SW5 3 19 IO7 SW4 4 18 IO0 SW3 5 17 GNDD TO 6 16 GNDL TI1 7 15 LIN 9 11 12 13 14 SW2 SW1 SW0 IO1 TI0 8 o Baud rate up to 19.2 kBaud o Frame processing o Low interrupt load to the application

MLX80105

Abstract: mlx80104 cable harness LIN bus QFN-5x5-28 Melexis MLX80104 IEC60134 MLX80105KLQ 63-ND mlf 5x5 J2602
Contextual Info: MLX80104/5 LIN Slave Controller for Switches Features Application Controller o Internal 12 MHz RC-Oscillator o 16-bit MULAN MCU with 16kB ROM, 512 Byte RAM, 192 Byte EEPROM with ECC o OTP version for small series production MLX80105) LIN Protocol Controller according to LIN 2.x and SAE J2602