MEMORIES Search Results

tr8c

Abstract: TMS28F200
Contextual Info: TMS28F20ÛBZT, TMS28F200BZB 262144 BY 8-BIT/131072 BY 16-BIT BOOT-BLOCK FLASH MEMORIES SWS2dOO - JUNE 1 9 9 4 - REVISED SEPTEMBER 1997 • ■ I I I • • • • • • • • • • Organization . . . 262144 by 8 bits 131072 by 16 bits Array-Blocking Architecture

A1051

Contextual Info: TMS27C291, TMS27C292 16.384-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORIES TMS27PC291 16,384-BIT PROGRAMMABLE READ-ONLY MEMORY SEPTEM BER 1986 —REVISED APRIL 1988 Organization . . . 2K x 8 J AND N PA C KA G E Pin Compatible with Existing 2K x 8 Bipolar/High-Speed CM OS EPROMs

Contextual Info: S N 5 4 A LS 2 2 9 A , S N 7 4 A LS 2 2 9 A 1 6 x 5 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 . M A R C H 1 9 8 6 -R E V IS E D M A Y 1 9 8 6 • Independent Asychronous Inputs and Outputs • 16 Words by 5 Bits Each • Data Rates from 0 to 30 MHz

CT 2048

Abstract: D8228
Contextual Info: SN74ACT7203L, SN74ACT7204L, SN74ACT7205L, SN74ACT7206L 2048 x 9,4096 x 9,8192 x 9,16384 x9 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES SCAS226A - FEBRUARY 1993 - REVISED SEPTEMBER 1995 Reads and Writes Can Be Asynchronous or Coincident Organization: - SN74ACT7203L - 2048 x 9

74ALS233

Contextual Info: S N 5 4 A LS 2 3 3 A , S N 7 4 A LS 2 3 3 A 1 6 x 5 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 . JA N U A R Y 1 9 8 6 - Package Options Include Plastic "Small Outline" Packages. Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs S N 54A LS 233A . . . J PACKAGE

TID136

Abstract: TID139 N6040
Contextual Info: TYPES TID135, TID136, TID139 THRU TID144 SILICON DIODE ARRAYS B U L L E T IN N O . D L -S 7 3 11 7 0 7, A P R IL 1 9 7 2 - R E V IS E D M A R C H 1973 L O G IC A N D C O R E -D R IV E R D IO D E A R R A Y S For Application With Magnetic Cores • Plated-Wire Memories

TCD120AC

Contextual Info: TCD120AC The TCD120AC is a contact type CCD linear image sensor. The device is consist of 5 staggered high sensitivity CCD chips. The device contains a row of 4800 photodiodes which provide a A00 dots/inch resolution across an A3 size paper. By the aid of analog line memories fabricated

TMS44C256

Contextual Info: TMS44C256, TMS44C257 262,144-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORIES JUNE 1 9 8 6 - • 2 6 2 ,1 4 4 X 4 Organization • Single 5-V Supply 10% Tolerance (TO P V IEW ) L 1 ^ 2 0 3 V SS 19 ] D Q 4 DQ2C 2 18 ] D Q 3 w [ 3 d q i Performance Ranges: TM S 4 4 C 2 5 _-1 0

Contextual Info: SN54ALS232A, SN74ALS232A 16 X ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 , OCTOBER 1 9 8 5 - • Independent A sy n c h ro n o u s Inputs and O u tp u ts • Package O ption s Include P lastic "S m a ll O u tlin e " Packages, C eram ic C hip Carriers,

tms jl 27C256-15

Abstract: tms jl 27c256-12 tms jl 27C256-10 TMS JL 27C256-20 TMS JE 27C256-15
Contextual Info: TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES _ SMLS25BH- SEPTEMBER 1964 - REVISED NOVEMSER 1997 Organization . . . 32768 by 8 Bits J PACKAGE TO P VIEW Single 5-V Power Supply Pin Compatible With Existing 256K MOS

Contextual Info: T E X A S I N S T R -[ A S I C / N E M O R Y > 7 D D E | A T b l 7 2 S □ □ 3 S 7 E 0 T T -Hb-13-3-5 PRODUCT PREVIEW TBP38SA165, TBP38SA166, TBP38SA16X 16,384-BIT 2048 WORDS BY 8 BITS STANDARD PROGRAMMABLE READ-ONLY MEMORIES JAN UARY 1985 —REVISED APRIL 1985

Ks-7b

Contextual Info: TMS417800, TMS417800P 2 097152 WORD BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORIES S M K S 7 8 0 -D E C E M B E R 1992 x 8 DE P AC K A G E t DZ P A C K AG E t TOP VIEW (TOP VIEW) * Performance Ranges: vcc[ 1o D Q 0[ 2 ACCESS ACCESS ACCESS READ TIME TIME TIME OR WRITE

44-800-p

Abstract: 44800P PIN DIAGRAM of IC AD 524 IN2045
Contextual Info: TMS44800, TMS44800P 524 288-WORD BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORIES SMHS480B-AUGUST1992-REVISED DECEMBER 1992 This data sheet is applicable to all TMS44800/Ps symbolized with Revision“B" and subsequent revisions as described on page 22. * Organization . . . 524 288 x 8

SMOS182

Contextual Info: TMS626802, TMS636802 1048576-WORD BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES SMOS182 - FEBRUARY 1994 TM S626802 LVTTL DGE PACKAGE (TO P VIE W ) 3.3-V Power Supply (10% Tolerance) Two Banks for On-Chip Interleaving (Gapless Accesses) vcc [ 1

TID126

Abstract: TID121 TID129 TID126 application
Contextual Info: TYPES TID2IA THRU TID26A, TID29A, TID30A, TID121 THRU TID126, TID129 THRU TID134 SILICON DIOOE ARRAYS B U L L E T IN N O . D L -S 7 0 1 1 3 2 5 , M A R C H 1 9 7 0 C O R E -D R IV E R D IO D E A R R A Y S For Application With Magnetic Cores • Plated-Wire Memories

K4004

Abstract: SN75361* equivalent SN75361A SN75107 SN55109A
Contextual Info: SN75207B DUAL SENSE AMPLIFIER FOR MOS MEMORIES OR DUAL HIGH-SENSITIVITY LINE RECEIVERS SLLS096C – JULY 1973 – REVISED MARCH 1997 D D D D D D D D D D D Plug-In Replacement for SN75107A and SN75107B With Improved Characteristics ± 10-mV Input Sensitivity

27c eeprom

Abstract: 27C291 74TTL
Contextual Info: 0^1755 DG77HS TMS27C291, TMS27C292 16,384-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORIES TMS27PC291 16,384-BIT PROGRAMMABLE READ ONLY MEMORY SEPTEMBER 1988-R EV ISED APRIL 1988 • Single 5-V Power Supply • Pin Compatible with Existing 2K x 8 BIpolar/High-Speed CMOS EPROMs

66C367PE

Contextual Info: SLE 66C367PE 8/16-Bit Security Controller with enhanced instruction set for large memories in 0.22 µm CMOS Technology 196-Kbytes ROM,4352 bytes RAM, 36-Kbytes EEPROM Dual Key Triple DES Sho rt Pro duc t O ve r vi e w May 2011 Chi p C ard & Sec u ri t y SLE 66C367PE

Contextual Info: TMS416160, TMS416160P 1 048 576-WORD BY 16-BIT HIGH-SPEED DYNAMIC RANDOM-ACCESS MEMORIES SMKS660-DECEMBER 1992 Organization. . . 1 048 576 x 16 RE P A C K A G E t DC P A C K AG E t TOP VIEW (TOP VIEW) Single 5-V Supply (10% Tolerance) '416160/P-60 '416160/P-70

AT91SAM3U4

Abstract: at91sam3 1N1308 MAR 735 REGULATOR IC 7912 pin identify AT91SAM3U4E SAM3u1 AT91SAM3U 3961 G.E 0x20180
Contextual Info: Features • Core • • • • • • – ARM Cortex®-M3 revision 2.0 running at up to 96 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set Memories – From 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator,

atxmega128B

Abstract: 141-003 0x0D00 XMEGA Application Notes
Contextual Info: 8/16-bit Atmel XMEGA B1 Microcontroller ATxmega128B1; ATxmega64B1 Features  High-performance, low-power Atmel AVR® XMEGA® 8/16-bit Microcontroller  Nonvolatile program and data memories          64K - 128KBytes of in-system self-programmable flash

sn75361

Abstract: SN55109A
Contextual Info: SN75207B DUAL SENSE AMPLIFIER FOR MOS MEMORIES OR DUAL HIGH-SENSITIVITY LINE RECEIVERS SLLS096C – JULY 1973 – REVISED MARCH 1997 D D D D D D D D D D D Plug-In Replacement for SN75107A and SN75107B With Improved Characteristics ± 10-mV Input Sensitivity

Contextual Info: SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 x 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003 D D D D D D D D D Choice of Memory Organizations

123401

Contextual Info: AVED MEMORY PRODUCTS Where Quality & Memory Merge AVEF29LV065U32SJ08-XX 32MB FLASH SIMM, based on AMD Am29LV065D Uniform Sector Flash Memory DESCRIPTION PIN CONFIGURATIONS AVED Memory Products AVEF29LV065U32SJ08-XX is a Flash Memory SIMM, composed of four 64Mbit CMOS flash memories, each organized as 8M X 8 bits mounted on a substrate