MIL STD 883 LATCHED DRIVERS Search Results

4801h

Abstract: UCS4801 UCS-480IH UCS4401H UCS-4401 UCS-4801H ucs-4801 UCS4801H UCS-4401H MIL-STD-8
Contextual Info: UCS-4401H a nd UCS-4801H HERMETIC BiMOS LATCHED DRIVERS UCS-4401H a n d UCS-4801H HERMETIC BiMOS LATCHED DRIVERS MIL-STD-883 Compliant FEATURES High-Voltage, High-Current Outputs Output Transient Protection CMOS, PMOS, NMOS, TTL Compatible Internal Pull-Down Resistors

UCS5810H

Abstract: UCS5810H883 UCS5815H Serial Latched Source Driver
Contextual Info: ucn/ 5810 MIL-STD-883 COMPLIANT BiMOS n 10-BIT SERIAL-INPUT, LATCHED SOUBCE DRIVER Combining low-power CM O S logic with bipolar source drivers, Type UCS5810H will simplify many display-system designs. Primarily intended for use with vacuum-fluorescent displays, this BiMOS 10-bit

ci 4548

Contextual Info: FEATU RES: D-type flip-flops to allow data flow in transparent, latched, and clocked modes. - 0.5 MICRON CMOS Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOP,

Contextual Info: 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - and D-type flip-flops to allow data flow in transparent, latched, clocked, and clock-enabled modes. 0.5 MICRON CMOS Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015;

Contextual Info: UCS-5822H HERMETIC BiMOS II 8-BIT, SERIAL-INPUT, LATCHED DRIVER UCS-5822H HERMETIC BiMOS II 8-BIT, SERIAL-INPUT, LATCHED DRIVER MIL-STD-883 Compliant FEATURES • 3 .3 M H z M in im u m D a ta In p u t R a te • H ig h -V o lta g e C u rre n t-S in k O u tp u ts

CMOS 4548

Contextual Info: 3.3V CMOS 18-BIT UNIVER­ SAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD FE A T U R E S : - D-type flip-flops to allow data flow in transparent, latched, and clocked modes. 0.5 MICRON CMOS Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015;

Contextual Info: SERIES UCS-4820H HERMETIC BiMOS 8-BIT, SERIAL-INPUT, LATCHED DRIVERS SERIES UCS-4820H HERMETIC BiMOS 8-BIT, SERIAL-INPUT, LATCHED DRIVERS MIL-STD-883 Compliant FEATURES • H ig h - V o lt a g e C u r r e n t - S i n k O u t p u t s • C M O S , P M O S , N M O S , T T L C o m p a ti b le

Contextual Info: IDT54/74FCT16543T/AT/CT/ET FAST CMOS 16-BIT LATCHED TRANSCEIVER FE A T U R E S : - 0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions - Typical tSK o (Output Skew) < 250ps - Low input and output leakage <1 |j A (max.) - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

cd4000 cmos logic series guide

Abstract: harris CD4011BE 16XXX CD74FCT257 CD74FCT2573 ic cd4000 SN 74 ABT H 163 163XXX CD74LPT244 74FCT7623
Contextual Info: FCT Logic Competitive Nomenclature Guide EX: CD74FCT162249ATMT MFG ID TEMP FAMILY PART # SPEED OUTPUT LVL PACKAGE HARRIS CD 74 FCT XXX 16XXX 162XXX 163XXX 2XXX BLANK A B C D E T E = PDIP EN = NARROW PDIP H = CHIP M = 300 MIL SOIC NM = 150 MIL SOIC QM = QSOP

sumitomo epoxy 6300h

Abstract: CY74FCT162543T EME-6300H
Contextual Info: Qualification Report April, 1995 QTP# 94433 Version 1.0 56-Pins TSSOP package CYPRESS SEMICONDUCTOR PAGE 3 PRODUCT DESCRIPTION for qualification Information provided in this document is intended for generic qualification and technically describes the Cypress part

LCC48

Contextual Info: M671342 4 K  8 CMOS Dual Port RAM with Semaphore Introduction The M671342 is a very low power CMOS dual port static RAM organised as 4096 x 8, with full hardware support of semaphore signaling between the two ports. The M671342 device provide two independant ports with

Contextual Info: High performance aerospace and defense solutions Introduction NXP Semiconductors has been a trusted source and a leading provider of components to the Aerospace and Defense market for over 30 years. NXP’s components are applied in a wide array of Aerospace and Defense systems including Radar, SDR Software Defined Radio , ECM (Electronic Countermeasures) and

Contextual Info: Temic M671342 S e m i c o n d u c t o r s 4 K x 8 CMOS Dual Port RAM with Semaphore Introduction The M671342 is a very low power CMOS dual port static RAM organised as 4096 x 8, with full hardware support of semaphore signaling between the two ports. The M671342 device provide two independant ports with

Transistor morocco 9740

Abstract: Ablebond 8360 con hdr hrs ablebond 8086 interfacing with 8254 peripheral Date Code Formats diodes St Microelectronics formatter board Canon interfacing of 8237 with 8086 ST tOP MaRKinGS 388BGA
Contextual Info: RELIABILITY REPORT Q98001 SICL BUSINESS UNIT REPORT NUMBER : Q98001 QUALIFICATION TYPE : NEW DEVICE - NEW PACKAGE DEVICE : STPC Client SIP101 SALES TYPES : STPCD0166BTC3 - STPCD0175BTC3 TECHNICAL CODE : MDBT*CHDT1BR PROCESS : HCMOS6 - CROLLES FAB LOCATION

67005E

Abstract: M67005 A12L CQFP68 P883
Contextual Info: M67005 8 K  8 CMOS Dual Port RAM Introduction The M67005 is a very low power CMOS dual port static RAM organized as 8192 x 8. The M67005 is designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bit or

67024E

Abstract: M67024 j-cerquad 84 100-PIN Shared resource arbitration
Contextual Info: M67024 4 K  16 CMOS Dual Port RAM Introduction The M67024 is a very low power CMOS dual port static RAM organised as 4096 x 16. The M67024 is designed to be used as a stand-alone 16 bit dual port RAM or as a combination MASTER/SLAVE dual port for 32 bit or

Contextual Info: CY7C372i UltraLogic 64-Macrocell Flash CPLD Features FLASH370i™ family of high-density, high-speed CPLDs. Like all members of the FLASH370i family, the CY7C372i is designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to

CY7C372I-66JC

Abstract: preset resistor
Contextual Info: fax id: 6137 CY7C372i UltraLogic 64-Macrocell Flash CPLD Features FLASH370i™ family of high-density, high-speed CPLDs. Like all members of the FLASH370i family, the CY7C372i is designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to

ULTRA37000

Contextual Info: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C372i UltraLogic™ 64-Macrocell Flash CPLD Features Functional Description • 64 macrocells in four logic blocks The CY7C372i is an In-System Reprogrammable Complex Programmable Logic Device CPLD and is part of the

Contextual Info: 72i CY7C372i UltraLogic 64-Macrocell Flash CPLD Features FLASH370i™ family of high-density, high-speed CPLDs. Like all members of the FLASH370i family, the CY7C372i is designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to

Contextual Info: CY7C372i UltraLogic 64-Macrocell Flash CPLD Features Functional Description • 64 macrocells in four logic blocks The CY7C372i is an In-System Reprogrammable Complex Programmable Logic Device CPLD and is part of the FLASH370i™ family of high-density, high-speed CPLDs. Like

Contextual Info: CY7C372i UltraLogic 64-Macrocell Flash CPLD Features FLASH370i™ family of high-density, high-speed CPLDs. Like all members of the FLASH370i family, the CY7C372i is designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to

ULTRA37000

Contextual Info: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C372i UltraLogic™ 64-Macrocell Flash CPLD Features Functional Description • 64 macrocells in four logic blocks The CY7C372i is an In-System Reprogrammable Complex Programmable Logic Device CPLD and is part of the

Contextual Info: fax id: 6137 CY7C372i UltraLogic 64-Macrocell Flash CPLD Features FLASH370i™ family of high-density, high-speed CPLDs. Like all members of the FLASH370i family, the CY7C372i is designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to