MILSTD883 Search Results

Contextual Info: SEMICONDUCTOR PG03DXTEV TECHNICAL DATA TVS Diode Array for ESD Protection in Portable Electronics Protection in Portable Electronics Applications. FEATURES ・ESD Protection: IEC 61000-4-2 Level 4. MILSTD883C-Method 3015-6:Class 3 ・Four separate unidirectional configurations for protection

Contextual Info: TLE2037, TLE2037A EXCALIBUR LOW -NOISE HIGH-SPEED PRECISION DECOM PENSATED OPERATIONAL AM PLIFIERS D3454, MAY 1990 - REVISED APRIL 1991 available features Outstanding Combination of DC Precision and AC Performance: Gain-Bandwldth Product. . . 80 MHz Typ V

Contextual Info: TLC339M, TLC339I, TLC339C QUADRUPLE MICROPOWER LinCMOS COMPARATORS D3135, DECEMBER 1986-R EV ISED FEBRUARY 1989 • Very Low Power. . . 200 jjiW Typ at 5 V T LC 339M . . . J PACKAGE TLC339I. TLC339C . . . D. J, OR N PACKAGE • Fast Response Time . . . 2.5 |xs Typ with

Contextual Info: UT54 ACS 153/UT54ACTS153 Radiation-Hardened Quadruple 4 to 1 Multiplexers PINOUTS FEATURES • 16-Pin D IP Top View 1.2n radiation-hardened CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QM L Q o r V processes Flexible package

1d4 cb

Contextual Info: SN54ABT16373A, SN74ABT16373A 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS S CB S160 - DE CE M B E R 1992 Members of the Texas Instruments Widebus Family SN54ABT16373A . . . WD PACKAGE SN74ABT16373A . . . DGG OR DL PACKAGE TOP VIEW State-of-the-Art EPIC-llB™ BiCMOS Design

Contextual Info: SN74LVC540 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 • Space-Saving Package Option: Shrink Small-Outline Package DB Features EIAJ 0.65-mm Lead Pitch DB, DW, OR PW PACKAGE (TOP VIEW) • EPIC (Enhanced-Performance implanted CMOS) Submicron Process

K2545

Abstract: cx 2808 tlc2652 TLC2652A D3157
Contextual Info: TLC2652, TLC2652A Advanced LinCMOS1 PRECISION CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS D3157, SEPTEMBER 1988 0008, JG, or P PACKAGE Extremely Low Offset Voltage . . 1 nV Max TOP VIEW Extremely Low Change in Offset Voltage with Temperature . . . 0.003nV/°CTyp

wc 2c

Contextual Info: SMJ4416 16.384-WORD BY 4-BIT DYNAMIC RAM AUGUST 1980 JO PACKAGE 1 6 ,3 8 4 x 4 O rg anizatio n TO P V IE W S ingle 5 -V S u p p ly ( ± 1 0 % T olerance) g P erfo rm a nce Ranges ACCESS T IM E • DQ1 C C2 DQ 2C Ul8 Dvss 17 3 D Q 4 3 16 4 15 "2C A S "2D Q 3

CO2V

Contextual Info: SN74ALVC16600 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE TOP VIEW ÖEÄE [ LEAB [ A1 [ GND [ A2 [ A3 [ EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process

51A-2

Contextual Info: SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS S CBS085B - D3794, FEBR UARY 1991 - R EVISED JULY 1993 SN54ABT16470. . WD P ACKAG E SN74ABT16470. . DL P ACKAG E TOP VIEW Members of the Texas Instruments Widebus Family State-of-the-Art EPIC-UB ™ BiCMOS Design

Contextual Info: SN54BCT2828B, SN74BCT2828B 10-BIT BUS/MOS MEMORY DRIVERS WITH 3-STATE INVERTING OUTPUTS _ D3635, SEPTEMBER 1990 S N 54B C T282B B . . . J T P A C K A G E BiCMOS Design Substantially Reduces S N 7 4B C T 28 2 8B . . . D W O R N T P A C K A G E

ABT16374A

Contextual Info: SN54ABT16374A, SN74ABT16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS MARCH 1993-R EV IS ED JULY 1993 Members of the Texas Instruments Widebus Family State-of-the-Art EPIC-HB" BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per

Contextual Info: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS M ARCH 1993 OB, DW, OR PW PACKAGE TOP VIEW • Space-Saving Package Option: Shrink Small-Outline Package (DB) Features EIAJ 0.65-mm Lead Pitch • EPIC (Enhanced-Performance Implanted

Contextual Info: UT54ACS 139/UT54ACTS 139 Radiation-Hardened Dual 2-Line to 4-Line Decoders/Demultiplexers PINOUTS FEATURES 16-Pin DIP Top View • Incorporates two enable inputs to simplify cascading and/or data reception • 1.2 1 radiation-hardened CMOS - Latchup immune

SN54LV14

Abstract: 2020CN
Contextual Info: SN54LV14, SN74LV14 HEX SCHMITT-TRIGGER INVERTERS _ S C L S 1 8 7 B - FEBRUARY 1 9 9 3 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-|i Process SN54LV14 . . . J OR W PACKAGE SN74LV14. . . D, DB, OR PW PACKAGE (TOP VIEW) TVplcal V q l p (Output Ground Bounce)

Contextual Info: SN74LVC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET JANUARY 1993 D, DB, OR PW PACKAGE TOP VIEW • EPIC (Enhanced-Performance Implanted 1CCR [ 1 1D [ 2 CMOS) Submicron Process • 1CLK [ 3 Designed to Facilitate Incident Wave

Contextual Info: SN54LVU04, SN74LVU04 HEX INVERTERS S C L S 1 B 5 B - FEBRUARY 1993 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-n Process Typical V q l p (Output Ground Bounce) < 0.8 V at V c c . Ta = 25°C Typical V q h v (Output V q h Undershoot)

Contextual Info: TLC193 TLC393 DUAL MICROPOWER LinCMOS VOLTAGE COMPARATOR SLCS115D - DECEMBER 1986 - REVISED JANUARY 1999 Very Low Power . . . 110 ,uW Typ at 5 V D, JG, P, OR PW PACKAGE TOP VIEW Fast Response Time . . . tp|_n = 2.5 jas Typ With 5-mV Overdrive Single Supply Operation:

Contextual Info: SN54ABT16501, SN74ABT16501 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS _ SCBS086C - FEBRUARY 1991 - REVISED JANUARY 1997 Members of the Texas Instruments Widebus Family SN54ABT16501 . . . W D PACKAGE SN74ABT16501 . . . DGG OR DL PACKAGE

transistor et 455

Contextual Info: TL7702A, TL7705A, TL7709A, TL7712A, TL7715A TL7702AY, TL7705AY, TL7709AY, TL7712AY, TL7715AY SUPPLY VOLTAGE SUPERVISORS SLVS028C - APRIL 1983 - REVISED AUGUST 1995 • Power-On Reset Generator • Automatic Reset Generation After Voltage Drop D, JG, OR P PACKAGE

Contextual Info: REFERENCE DATA Production Standard Note TK111XXM Table of C ontents 1 . S tr u c tu r e /F e a tu r e 2 . E lectrical C haracteristics Specification for S ta n d ard Device 3 . P in Layout 4 . T est C ircuit 5 . Block D iagram D efinition of Term s Sensor C ircuit

Contextual Info: SN74ALVC16601 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS JANUARY 1993 DGG OR DL PACKAGE TOP VIEW UBT (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Mode

Contextual Info: UT54ACS27/UT54ACTS27 Radiation-Hardened Triple 3-Input NOR Gates FEA TU R ES P IN O U T S 14-P in D IP Top View • 1 . 2 \i rad iatio n -h ard en ed C M O S - Latchup im m une • H igh speed • Low p o w er consum ption A 1C 1 B id 2 14 m v DD 13 □ c i

Contextual Info: UT54ACS 169/UT54ACTS 169 Radiation-Hardened 4-Bit Up-Down Binary Counters FEATURES PIN O U T S • Fully synchronous o p eratio n for counting and pro­ gram m ing • Internal look-ahead for fast counting • Carry output for n-bit cascading • Fully independent clock circuit