MODEL LMI 521 Search Results

Model LMI 521

Abstract: Extensometer
Contextual Info: Model LMI 521 Revere Load Moment Indicators FEATURES • Visual display provides continuous awareness of loading  Proportional display of loading using 7 colored high intensity LED  Dash mount  Quickly and easily calibrated in the field  Visual and audible warnings of over load

LMI 458

Abstract: ic 321 ENC2COUNT tele 539 PE-MCXMAC 85z3 trxcom 8XC196KD transistor m1511 MAC5 circuit
Contextual Info: EtherMap -3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226 DATA SHEET PRODUCT PREVIEW • Supports up to eight 10/100 Mbit/s Ethernet ports, each using a SMII interface • Supports a single 1000 Mbit/s Ethernet port, using a parallel GMII interface lead shared with SMII interfaces

TSF 1303

Abstract: MAC-07
Contextual Info: EtherMap -3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226 DATA SHEET PRODUCT PREVIEW TELECOM BUS SIDE +1.8V +3.3V HO/LO RING Ports APPLICATIONS • • • • • HO/LO POH Ports SONET/SDH add/drop and terminal multiplexers Multi-service access platforms

TSF 1303

Abstract: A8A2
Contextual Info: EtherMap -3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226B DATA SHEET PRODUCT PREVIEW HO/LO RING Ports TELECOM BUS SIDE +1.8V +3.3V HO/LO POH Ports The EtherMap™-3 is a highly integrated EoS device that provides for mapping of 10/100/1000 Mbit/s Ethernet into SONET/SDH STS-3/STM-1

SD1A12

Abstract: ETHERMAP-12 B21G SD2D10 SD1A MPC8260 MPC860 TXC-04212 matrix transport IC LA 7837
Contextual Info: EtherMap -12 Device Ethernet into STS-12/STM-4 SONET/SDH Mapper TXC-04212 DATA SHEET PRODUCT PREVIEW N O E AT I G M N A H C TO T C JE CLOCKS SONET/SDH Ref, System, One Sec. Ethernet Line Side IC H W EtherMap-12 Ethernet into STS-12/STM-4 SONET/SDH Mapper

Contextual Info: EtherMap -3 Plus Device OC-3/STM-1 Ethernet over SONET Mapper with Rapid Restoration TXC-04236 DATA SHEET • Eight 10/100 Mbit/s Ethernet ports, each using a SMII interface • Single 1000 Mbit/s Ethernet port, using a parallel GMII interface lead shared with SMII interfaces

Contextual Info: EtherMap -3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226B DATA SHEET HO/LO RING Ports TELECOM BUS SIDE +1.8V +3.3V HO/LO POH Ports The EtherMap™-3 is a highly integrated EoS device that provides for mapping of 10/100/1000 Mbit/s Ethernet into SONET/SDH STS-3/STM-1

Contextual Info: EtherMap-3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226B DATA SHEET HO/LO RING Ports TELECOM BUS SIDE +1.8V +3.3V HO/LO POH Ports The EtherMap-3 is a highly integrated EoS device that provides for mapping of 10/100/1000 Mbit/s Ethernet into SONET/SDH STS-3/STM-1

Contextual Info: EtherMap-3 Plus Device OC-3 Ethernet over SONET Mapper with Rapid Restoration TXC-04236 DATA SHEET HO/LO RING Ports TELECOM BUS SIDE +1.8V +3.3V HO/LO POH Ports The EtherMap-3 Plus is a highly integrated EoS device that provides for mapping of 10/100/1000 Mbit/s Ethernet into SONET/SDH STS-3/STM-1

TXC04236AIBG

Abstract: PLM 54 TXC-04236-MB TXC-04236 GFP 740 TXC-06951 TXC-04236-AIBG ETHERMAP-3 TXC-04236AIBG 0x12c2
Contextual Info: EtherMap -3 Plus Device OC-3/STM-1 Ethernet over SONET Mapper with Rapid Restoration TXC-04236 DATA SHEET • Eight 10/100 Mbit/s Ethernet ports, each using a SMII interface • Single 1000 Mbit/s Ethernet port, using a parallel GMII interface lead shared with SMII interfaces

TXC-06710

Abstract: GFP 740 gfp 840 MAC125MG msap transistor m1511 ethermap-3 loloa7 FRS Receiver 81TA
Contextual Info: EtherMap -3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226B DATA SHEET PRODUCT PREVIEW HO/LO RING Ports TELECOM BUS SIDE +1.8V +3.3V HO/LO POH Ports The EtherMap™-3 is a highly integrated EoS device that provides for mapping of 10/100/1000 Mbit/s Ethernet into SONET/SDH STS-3/STM-1

Contextual Info: EtherMap -3 Plus Device OC-3 Ethernet over SONET Mapper with Rapid Restoration TXC-04236 DATA SHEET HO/LO RING Ports TELECOM BUS SIDE +1.8V +3.3V HO/LO POH Ports The EtherMap™-3 Plus is a highly integrated EoS device that provides for mapping of 10/100/1000 Mbit/s Ethernet into SONET/SDH STS-3/STM-1

MAC125MG

Abstract: TXC-04236 LF 357 equivalent TXC-04236AIBG RFC-1661
Contextual Info: EtherMap -3 Plus Device OC-3 Ethernet over SONET Mapper with Rapid Restoration TXC-04236 DATA SHEET PRODUCT PREVIEW HO/LO RING Ports TELECOM BUS SIDE +1.8V +3.3V HO/LO POH Ports The EtherMap™-3 Plus is a highly integrated EoS device that provides for mapping of 10/100/1000 Mbit/s Ethernet into SONET/SDH STS-3/STM-1

lcd 34 pin

Abstract: 27c128A I27512 nec 76f msm4069 PC386LS AC180 VII AC90132V ac -dc -ac220v 50h i2764
Contextual Info: EASE64165/167 Program Development Support for the MSM64165/167 Family User's Manual Rev. 1.13 June 1994 OKI NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Please make sure before using the product that the information you are referring to is up

44-PIN

Abstract: 68HC11 DSP1609 HC11 T5490 IM91 XWXX
Contextual Info: Preliminary Data Sheet July 1999 DSP1609 Digital Signal Processor 1 Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ For 5 V operation: — 10.0 ns instruction cycle time 100 MIPS (See Table 92 on page 73.)

CSP1009

Abstract: 1600-HDS 310F4
Contextual Info: Advance Data Sheet July 1999 B900 Baseband Signal Processor 1 Features 2 Description • For 5 V operation: — 12.5 ns instruction cycle time 80 MIPS (See Table 89 on page 71.) ■ For 3.3 V operation: — 16.7 ns instruction cycle time (60 MIPS) (See Table 89 on page 71.)

44-PIN

Abstract: 68HC11 DSP1609 DSP1609F HC11 DSP1600 lucent 451
Contextual Info: Preliminary Data Sheet July 1999 FlashDSP 1609F Digital Signal Processor 1 Features • ■ 12.5 ns instruction cycle time 80 MIPS at 3.3 V operation Power-saving features: — Low-power 0.35 µm CMOS technology; fully static design — Active power: 6.5 mW/MIPS at 3.3 V

dsp16a block diagram

Abstract: DSP16A PDA30 DSP1616 T9682 t86a WE DSP16A DB10 AT&T DSP1610
Contextual Info: Data Sheet September 1995 RT DSP1616-x11 Digital Signal Processor 1 Features Optimized for digital cellular applications with a bit manipulation unit for higher signal coding efficiency 38 ns and 33 ns instruction cycle Low power consumption: <15.0 mW/MIPS typical at 5 V

Contextual Info: Data Sheet September 1995 m A T& T Microelectronics DSP1616-X11 Digital Signal Processor 1 Features 2 Description • Optimized for digital cellular applications with a bit manipulation unit for higher signal coding efficiency ■ 38 ns and 33 ns instruction cycle

Contextual Info: iH Data Sheet May 1995 A T & T Microelectronics DSP1616-X30 Digital Signal Processor 1 Features 2 Description • Optimized for digital cellular applications with a bit manipulation unit for higher signal coding efficiency ■ 20 ns, 25 ns, and 30 ns instruction cycle times

EASE64158

Abstract: SN74S1057 MSM4069 i2764 NEC-PC9801 PC386LS MSM64152 27c128A MSM64153 M64155
Contextual Info: EASE64158 Program Development Support for the MSM64153 Family User's Manual Rev. 1.01 May. 1994 OKI NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Please make sure before using the product that the information you are referring to is up

DSP16xx

Abstract: LUCENT DSP1610 intel 4008 intel 4040 DSP1620 DSP1627 DSP1628 DSP1629 DSP1610 DSP1618 eccp
Contextual Info: Advisory May 1999 Clarification to the Serial I/O Control Register Description for the DSP1620/27/28/29 Devices Active Clock Frequency The purpose of this advisory is to clarify the function of the serial I/O control registers in the DSP1620/27/28/29 devices. Specifically, it clarifies the function of the control register field that specifies the active clock frequency.

Contextual Info: Preliminary Data Sheet February 1997 m icroelectronics group Lucent Technologies Bell Labs Innovations DSP1628 Digital Signal Processor 1 Features 2 Description • Optimized for digital cellular applications with a bit manipulation unit for higher coding efficiency and

Contextual Info: AT&T Preliminary Data Sheet October 1995 Microelectronics DSP1627 Digital Signal Processor 1 Features 2 Description • Optimized for digital cellular applications with a bit manipulation unit for higher coding efficiency ■ On-chip, programmable, PLL clock synthesizer