MOSELVITELIC Search Results

Contextual Info: MOSEL- VITELIC V404J232 and V404J236 2M X 32 and 2M X 36 CMOS MEMORY MODULES PRELIMINARY Features Description • ■ ■ ■ ■ ■ The V404J232 memory Module is organized as 2,097,152 x 32 bits in a 72-lead single-in-line mod­ ule. The 2M x 32 memory module uses 16 MoselVitelic 1M x 4 DRAMs. The V404J236 Memory

Contextual Info: MOSEL- VITELIC PRELIMINARY V104J232, V104J236 512K x 32, 512K x 36 SIMM Features Description m 524,288 x 32 bit or 524, 288 x 36 bit The V 104J232 Memory Module is organized as 52 4 ,2 8 8 x 32 bits in a 72-lead single-in-line module. The 51 2K x 32 memory module uses 16 MoselVitelic 256K x 4 DRAMs. The V104J236 is organized

Contextual Info: MOSEL-VITELIC V404J32and V404J36 1M x32and 1M x36 CMOS MEMORY MODULES PRELIMINARY Features Description • ■ ■ ■ ■ ■ The V404J32 memory Module is organized as 1,048,576 x 32 bits in a 72-lead single-in-line mod­ ule. The 1M x 32 memory module uses 8 MoselVitelic 1M x 4 DRAMs. The V404J36 Memory Mod­

DH311

Contextual Info: M OSEL v m u c PRELIMINARY V404J32 and V404J36 1M x 32 and 1M x 36 CMOS MEMORY MODULES Features Description u • ■ ■ ■ ■ The V404J32 memory Module is organized as 1,048,576 x 32 bits in a 72-lead single-in-line mod­ ule. The 1M x 32 memory module uses 8 MoselVitelic 1M x 4 DRAMs. The V404J36 Memory Mod­

Contextual Info: MOSEL VITELIC PRELIMINARY V408J32 1M X 32 HIGH PERFORMANCE EDO MEMORY MODULE Features Description • ■ The V408J32 memory Module is organized as 1,097,152 x 32 bits in a 72-lead single-in-line mod­ ule. The 1M x 32 memory module uses 8 MoselVitelic 1M x 4 DRAMs. The x32 modules are ideal

Contextual Info: MOSEL VITELIC PRELIMINARY V408J32 1M x 32 HIGH PERFORMANCE EDO MEMORY MODULE Features Description • ■ The V 408J32 memory Module is organized as 1,097,152 x 32 bits in a 72-lead single-in-line mod­ ule. The 1M x 32 memory module uses 8 MoselVitelic 1M x 4 DRAMs. The x32 modules are ideal

Contextual Info: M O S E L V IT E U C P R E LIM IN A R Y V1780J32 2 M x 32 E D O M E M O R Y M O D U LE Features Description m 2,097,152 x 32 bit organization The V1708J32 memory module is organized as 2,097,152 x 32 bits in a 72-lead single-in-line mod­ ule. The 2M x 32 memory module uses 4 MoselVitelic 1M x 16 DRAMs. The x32 modules are ideal

Contextual Info: M O S E L VITELIC PRELIMINARY V408J232 2M x 32 HIGH PERFORMANCE EDO MEMORY MODULE Features Description • ■ The V 408J232 memory Module is organized as 2,097,152 x 32 bits in a 72-lead single-in-line mod­ ule. The 2M x 32 memory module uses 16 MoselVitelic 1M x 4 DRAMs. The x32 modules are Ideal

Contextual Info: M OSEL V I T E L I C P R E LIM IN A R Y V62C3181024 2 .7 VOL T 1 2 8 K X 8 STA TIC R A M • Packages - 32-pin TSOP Standard - 32-pin 440 mil SOP (525 mil pin-to-pin) Features ■ High-speed: 35, 70 ns ■ Ultra low DC operating current of 25 mA (max.) - TTL Standby: 3 mA (Max.)

100MHZ

Abstract: 133MHZ PC200 V827332U04S
Contextual Info: MOSEL VITELIC V827332U04S 2.5 VOLT 32M x 72 HIGH PERFORMANCE REGISTERED ECC DDR SDRAM MODULE PRELIMINARY Features Description • 184 Pin Registered 33,554,432 x 72 bit Organization DDR SDRAM Modules ■ Utilizes High Performance 16M x 8 DDR SDRAM in TSOPII-66 Packages

100MHZ

Abstract: 133MHZ PC200 V827332K04SATG V827332K04SXXX
Contextual Info: MOSEL VITELIC V827332K04SATG 2.5 VOLT 32M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE PRELIMINARY Features Description • 184 Pin Unbuffered 33,554,432 x 72 bit Organization DDR SDRAM Modules ■ Utilizes High Performance 16M x 8 DDR SDRAM in TSOPII-66 Packages

V62C2804096

Contextual Info: MOSEL VITELIC PRELIMINARY V62C2804096 512K X 8, CMOS STATIC RAM Features Description • ■ ■ ■ ■ ■ ■ ■ The V62C2804096 is a very low power CMOS static RAM organized as 524,288 words by 8 bits. Easy memory expansion is provided by an active LOW CE1, and active HIGH CE2, an active LOW

2388

Abstract: 305C M9009 MSM9009
Contextual Info: MSM9009 MOSEL VITELIC INC. April 1996 80" Emulation board Features Up to 87.2 seconds voice emulation are provided at 6K sampling rate. MPCM-5 algorithm emulation is provided. Up to 128 sections are provided for three addressing modes, each section comes from a voice file.

TC5118160

Abstract: msm-561 TMS444000 msm561 M5M418165 M5M418160 tms44c256 TC5117405 HY514264 HY514260
Contextual Info: New Page 1 DRAM 1Meg 1Mx1 256Kx4 FPM FPM Fujitsu MB81C100 MB81C4256 Goldstar GM71C100 GM71C4256 Hitachi HM511000 HM514256 Hyundai HY531000 HY534256 Micron MT4C1024 MT4C4256 Mitsubishi M5M41000 M5M44256 Nec UPD421000 UPD424256 Oki MSM511000 MSM514256 Samsung alt KM41C1000 KM44C256

V54C3128164VAT

Contextual Info: V54C3128164VAT HIGH PERFORMANCE 143/133/125MHz 3.3 VOLT 8M X 16 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 16 MOSEL VITELIC PRELIMINARY 7PC 7 8PC System Frequency fCK 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3

TMS44C256

Abstract: HY6116 CROSS REFERENCE sram mcm6264 ZMD cross reference SIMTEK cross reference HM50464 soj28 sop28 HM65664A HM6116 oki cross
Contextual Info: ZMD Cross Reference List Density Organization Store Type 4Kbit 512 x 8 HardStore 16Kbit 2K x 8 CapStore PowerStore HardStore SoftStore PowerStore PowerStore 64Kbit 8K x 8 CapStore HardStore SoftStore PowerStore PowerStore 256Kbit 32K x 8 CapStore SoftStore

V62C3161024L

Contextual Info: V62C3161024L L Ultra Low Power 64K x 16 CMOS SRAM Features Functional Description • Ultra Low-power consumption - Active: 40mA ICC at 55ns - Stand-by: 5 µA (CMOS input/output) 1 µA (CMOS input/output, L version) TheV62C3161024L is a Low Power CMOS Static RAM

PC2100U

Abstract: PC200 V826516G04S
Contextual Info: V826516G04S 128 MB 200-PIN DDR UNBUFFERED SODIMM 2.5 VOLT 16M x 64 MOSEL VITELIC PRELIMINARY Features Description • JEDEC 200 Pin DDR Unbuffered Small-Outline, Dual In-Line memory module SODIMM ; 16,777,216 x 64 bit organization. ■ Utilizes High Performance 16M x 8 SDRAM in

V43658R04VATG-75PC

Contextual Info: MOSEL VITELIC V43658R04VATG-75PC 3.3 VOLT 8M x 64 using 8M x 16 PC133 UNBUFFERED SDRAM MODULE PRELIMINARY Features Description • 168 Pin Unbuffered 8,388,608 x 64 bit Oganization SDRAM DIMM ■ Utilizes High Performance 128 Mbit, 8M x 16 SDRAM in TSOPII-54 Packages

CA10

Abstract: V54C3256804VA
Contextual Info: MOSEL VITELIC V54C3256804VA HIGH PERFORMANCE 3.3 VOLT 32M X 8 SYNCHRONOUS DRAM 4 BANKS X 8Mbit X 8 PRELIMINARY -7PC -7 -8PC -8 System Frequency fCK 143MHz 143MHz 125MHz 125MHz Clock Cycle Time (tCK3) 7 ns 7 ns 8 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3

V43658R04VATG-75

Contextual Info: MOSEL VITELIC V43658R04VATG-75 3.3 VOLT 8M x 64 using 8M x 16 PC133 UNBUFFERED SDRAM MODULE PRELIMINARY Features Description • 168 Pin Unbuffered 8,388,608 x 64 bit Oganization SDRAM DIMM ■ Utilizes High Performance 128 Mbit, 8M x 16 SDRAM in TSOPII-54 Packages

V54C3128164VAT

Abstract: V54C3128164 AAY3
Contextual Info: V54C3128164VAT HIGH PERFORMANCE 166/143/133/125MHz 3.3 VOLT 8M X 16 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 16 MOSEL VITELIC PRELIMINARY 6 7 75 8PC System Frequency fCK 166 MHz 143 MHz 133 MHz 125 MHz Clock Cycle Time (tCK3 ) 6 7 ns 7.5 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3

V62C5181024

Contextual Info: PRELIMINARY V62C5181024 128K X 8 STATIC RAM MOSEL VITELIC • Packages – 32-pin TSOP Standard – 32-pin 600 mil PDIP – 32-pin 440 mil SOP (525 mil pin-to-pin) Features ■ High-speed: 35, 70 ns ■ Ultra low DC operating current of 5mA (max.) TTL Standby: 5 mA (Max.)

V43728S04VTG-10

Abstract: V43728S04VTG-10PC V43728S04VTG-12 csc 2313 f
Contextual Info: MOSEL VITELIC PRELIMINARY V43728S04VTG 3.3 VOLT 8M x 72 HIGH PERFORMANCE PC100 AND 100 MHZ SDRAM UNBUFFERED DIMM Features Description • 168 Pin Unbuffered 8,388,608 x 72 bit Oganization SDRAM Modules ■ Utilizes High Performance 8M x 8 SDRAM in TSOPII-54 Packages