MXXXXXX Search Results

SOJ-400

Contextual Info: EDO/FP DIMM/SODIMM Code Information MXXXXXXXXXXX - XXXXX 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 12. PCB Revision 0 : None 2 : 2nd Rev. 4 : 4th Rev. 1. Memory Module M 2. Module Configuration 3 : DIMM 4 : 8 Byte SODIMM 1 : 1st Rev. 3 : 3rd Rev. 13. "─"

PC100

Abstract: pc133 SDRAM DIMM package 128MB
Contextual Info: SDRAM Module Code Information Last Updated : August 2009 MXXXXXXXXXXX - XXXXX 1 2 3 5 4 6 7 1. Memory Module M 2. Module Configuration 3 : 4/8 Byte DIMM (100, 168, 200, 232, 278pin) 4 : 8 Byte SODIMM (144pin) 3~4. Data bits 23 : x144/ECC PLL+Register DIMM

SGRAM

Abstract: 17-18 g
Contextual Info: SGRAM Module Code Information MXXXXXXXXXXX - XXXXX 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1. Memory Module M 12. PCB Revision & Type 0 : None 2. Module Configuration 8 : 4 Byte AIMM (132pin) 13. "─" 3~4. Data bits 32 : x32 AIMM w/o SPD 14. Power C : Normal, Self Ref.

Contextual Info: RTX-MxxxxxxUM Series Page 1 of 4 … … … … … … … … … … … … … … … … … … … … … … … … … … … … … … … … … … … … … … . Specification of Return Transmitter Module for Optical Node RTX-MxxxxxxUM Series

54-WBGA

Abstract: 711Mbps
Contextual Info: RDRAM Module Code Information 1/2 Last Updated : February 2009 MXXXXXXXXXXX - XXXXX 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1. Memory Module(M) 10. Component Generation M : M-die 2. Module Configuration D : 32 bit RIMM (232pin) A : A-die B : B-die

SOJ-400

Contextual Info: EDO/FP SIMM Code Information MXXXXXXXXXXX - XXXXX 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1. Memory Module M 11. Package J : SOJ-400(Gold Tab) 2. Module Configuration 5 : SIMM 12. PCB Revision 0 : None 3~4. Data bits 32 : x32 bit 13. "─" 5. Vcc, Mode1, Mode2

Contextual Info: Alle Hechte Vorbehalten/ ill rights resemi 1 2 3 I A k 5 6 M3x10 è H mxxxxxx ,_|-OO M :— — El 1 y 2 1 , 5 36 , 5 Oiiensions in m " t - Z I V C p ' Original Size DIN » 4 1- - - - - - * Nicht tolerierte Hafe/Free size Menaces Techn. Character. Dat.

Contextual Info: mxxxxxxxxxmoooooooocxxxvr Tx - SERIALIZER ÇN CO Rx - DESERIALIZER < C D C M r O ' v j - L o c Dr ^ o o c n o T - c M c o o 0Û Û0! a5! a5! a5! a5! a5! a5! a5! a5! a9! a^! a2! a27 N*

240pin dimm socket

Abstract: udimm udimm 240pin DIMM 276-pin 294pin PC2700 184-Pin samsung 512mb ddr cl3 dimm
Contextual Info: DDR SDRAM Module Code Information 1/2 Last Updated : August 2009 MXXXXXXXXXXX - XXXXX 1 2 3 4 5 6 7 8 1. Memory Module(M) 9 10 11 12 13 14 15 16 17 18 5. Feature, Voltage L : DDR SDRAM, 2.5V 2. Module Configuration 3 : 4/8 Byte DIMM 4 : 4/8 Byte SODIMM 3~4. Data bit

TRW J500

Abstract: k45752 52S marking
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT _ / /¿PD42S4260L, 424260L 3.3 V OPERATION 4 M-BIT DYNAMIC RAM 256 K-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The fiPD42S4260L, 424260L are 262 144 words by 16 bits dynamic CMOS RAMs. The fast page mode and

LXXXXXXXX

Abstract: TNC 24 mk 2 026R CY7C09569V tb136 A14L CY7C09579V
Contextual Info: «oaHaoooiMMMWfMMMMMM!9:^ v’*'» -• -■ -■ -^ jjÉBT *¿f5’00“’ '*'^ 7“T ■ ■ ■ ■ <1; .r {• o CY7C09569V CY7C09579V PRELIMINARY f:,ò b 3.3V 16K/32K x 36 FLEx36 Synchronous Dual-Port Static RAM • 3.3V Low o p e ratin g p ow er

a00u

Abstract: Z32100 STK 411 230 WE32100 ALI m7 101b BUX 707 z32101 Z32103 BUDA lo4p
Contextual Info: Y " P ro d u ct S pecification January 1987 Z32103 D R A M C O N TR O LLER DESCRIPTION T he Z32103 D R A M Controller provides address multiplexing, access and cycle time management, and refresh control for dynam ic random access m emory DRAM . It provides, in a single chip,

67c4033-15n

Contextual Info: 67C4033 Advanced Micro Devices Low Density First-In First-Out FIFO 64 x 5 CMOS Memory (Cascadable) DISTINCTIVE CHARACTERISTICS • Zero standby power ■ High-speed 15 MHz shift-in/shlft-out rates ■ Very low active power consumption ■ TTL-compatible Inputs and outputs

Si502

Contextual Info: Si501/2/3 3 2 K H Z –100 MH Z CMEMS  オ シ レ ー タ 機能          広い周波数範囲：32 kHz~100 MHz  周波数が 100 MHz 以上の場合は Silicon Labs にお問い合わせくだ   さい。

Contextual Info: TO SHIBA THM73V8015ATG-4f-5 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 8,388,608-WORD BY 72-BIT DYNAMIC RAM MODULE DESCRIPTION The THM73V8015ATG is a 8,388,608-word by 72-bit dynamic RAM module consisting of nine TC5165805AFT DRAMs on a printed circuit board. This module is optimized for applications which

toshiba S-AU

Abstract: TC5165805
Contextual Info: TO SHIBA THM73V1635ATG-4f-5 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 16,777,216-WORD BY 72-BIT DYNAMIC RAM MODULE DESCRIPTION The TH M 73V1635ATG is a 16,777,216-word by 72-bit dynam ic R A M module consisting of 18 T C 5164405A F T D R A M s on a printed circu it board. This module is optimized for applications w hich

Contextual Info: TO SHIBA THM65V8015ATG-4f-5 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 8,388,608-WORD BY 64-BIT DYNAMIC RAM MODULE DESCRIPTION The THM65V8015ATG is a 8,388,608-word by 64-bit dynamic RAM module consisting of eight TC5165805AFT DRAMs on a printed circuit board. This module is optimized for applications which

LD113

Contextual Info: Advance Data Sheet October 1998 microelectronics group Lucent Technologies Bell Labs Innovations Ambassador T8100A, T8102, and T8105 H.100/H.110 Interfaces and Time-Slot Interchangers 1 Product Overview • Two independently programmable groups of up to

Contextual Info: HN29W6411A Series 64M AND type Flash Memory More than 16,057-sector 67,824,768-bit HITACHI ADE-203-865D€ (Z) Rev. 21.0 FebQet. 20, 1999K Description The Hitachi HN29W6411A Series is a CMOS Flash Memory with AND type memory cells. It has fully automatic programming and erase capabilities with a single 3.3 V and 5 V power supply. The functions are

acs 08 5s

Contextual Info: H M 6 7 0 9 S 6 r Ì G S — Preliminary 65536-Word x 4-Bit High Speed Static RAM with ÜE • FEATURES • Super Fast Access Tim e. • Fast 5 E Access T im e . • Low Power Dissipation.

HM514101

Abstract: FL256
Contextual Info: HM514101 C/CL Series 4,194,304-word x Preliminary 1-bit Dynamic Random Access Memory Rev. 0.0 Sep. 15,1994 HITACHI The Hitachi HM514101C/CL is a CMOS dynamic RAM organized 4,194,304-w ord x 1-bit. HM514101C7CL has realized higher density, higher performance and various functions by

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT «P D 421165 1 M-BIT DYNAMIC RAM 64K-W ORD BY 16-BIT, HYPER PAGE MODE EDO , BYTE READ/W RITE MODE d e sc r ip tio n The JUPD421165 is a 65,536 words by 16 bits CMOS dynamic RAM with optional hyper page mode (EDO). Hyper page mode (EDO) is a kind of the page mode and is useful for the read operation.

Contextual Info: Order this document by MCM516165B/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1M x 16 Advance Information 16M CMOS Wide DRAM Family EDO, 1M x 16,1K, and 4K Refresh The family of 16M Dynamic RAMs is fabricated using 0.50p. C M O S high-speed silicon-gate process technology. It includes devices organized as 1,048,576 six­

upd4217405

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT ¿iPD42S17405, 4217405 16 M-BIT DYNAMIC RAM 4 M-WORD BY 4-BIT, EDO Description The /¿PD42S17405, 4217405 are 4,194,304 words by 4 bits CMOS dynamic RAMs with optional EDO. EDO is a kind of the page mode and is useful for the read operation.