NAND 7400 Search Results

hc 7400

Abstract: ls 7400 7400 hc 7400 quad 2-input nand tl 7400 74LSOO 7400 7400 QUAD NAND 7400 quad
Contextual Info: - 15 7400 Quad 2 Input NAND

UDZV2.0B

Contextual Info: P400e 1.8-Inch NAND Flash SSD Features P400e 1.8-Inch SATA NAND Flash SSD MTFDDAA050MAR, MTFDDAA100MAR, MTFDDAA200MAR, MTFDDAA400MAR Features • Micron 25mm MLC NAND Flash • Capacity1 unformatted : 50GB, 100GB, 200GB, 400GB • RoHS-compliant package

MTFDDAA100MAR

Contextual Info: P400e 1.8-Inch NAND Flash SSD Features P400e 1.8-Inch SATA NAND Flash SSD MTFDDAA050MAR, MTFDDAA100MAR, MTFDDAA200MAR, MTFDDAA400MAR Features • Micron 25nm MLC NAND Flash • Capacity1 unformatted : 50GB, 100GB, 200GB, 400GB • RoHS-compliant package

Contextual Info: P400e 2.5-Inch NAND Flash SSD Features P400e 2.5-Inch SATA NAND Flash SSD MTFDDAK050MAR, MTFDDAK100MAR, MTFDDAK200MAR, MTFDDAK400MAR Features • • • • • • • • • • • • • • Micron 25nm MLC NAND Flash RoHS-compliant package SATA 6 Gb/s interface

MM74C02

Contextual Info: Semiconductor MM54C00/MM74C00 MM54C02/MM74C02 MM54C04/MM74C04 MM54C10/MM74C10 MM54C20/MM74C20 February 1988 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter Triple 3-Input NAND Gate Dual 4-Input NAND Gate General Description Features These logic gates employ complementary MOS CMOS to

sata ssd controller

Contextual Info: P400e 2.5-Inch NAND Flash SSD Features P400e 2.5-Inch SATA NAND Flash SSD MTFDDAK050MAR, MTFDDAK100MAR, MTFDDAK200MAR, MTFDDAK400MAR Features • • • • • • • • • • • • • • Micron 25nm MLC NAND Flash RoHS-compliant package SATA 6 Gb/s interface

Contextual Info: DM74ALS1000A Quadruple 2-lnput NAND Buffer General Description Features These devices contain four independent 2-input buffer/driv­ ers, each of which performs the logic NAND function. The ’ALS1000A is a buffer/driver version of the ’ALSOOA. • Switching specifications at 50 pF

FZH115B

Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Contextual Info: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P

Contextual Info: S E M IC O N D U C T O R tm DM74ALS10A Triple 3-Input NAND Gate This device contains three independent gates, each of which perform s the logic NAND function. • Functionally and pin fo r pin com patible w ith Schottky and low pow er Schottky T T L counterpart

74F38

Contextual Info: R C H I I - P S E M IC O N D U C T O R tm 74F38 Quad Two-Input NAND Buffer Open Collector puts require external pull-up resistors fo r proper logical operation. General Description This device contains fo u r independent gates, each of which perform s th e logic NAND function. The o pen-collector out-

Contextual Info: S E M IC O N D U C T O R tm DM74ALS00A Quad 2-Input NAND Gate • A dvanced oxide-isolated, ion-im planted S c h o ttk y T T L process General Description This device contains fo u r independent gates, each of which perform s the logic NAND function. ■ Functionally and pin fo r pin com patible w ith Schottky

74LS00 function table

Abstract: pin configuration logic symbol 74LS00 ls 7400 specification of 74ls00 74LS00 pin configuration logic symbol 74LS00 pin configuration 74LS00 7400 ls TTL 74ls00 TTL LS 7400
Contextual Info: Signelics | 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE 7400 74LS00 74S00 TYPICAL SUPPLY CURRENT TOTAL 9ns 8mA 9.5ns 1.6mA 3ns 15mA ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; TA = 0°C to + 70°C

Contextual Info: December 1989 Semiconductor DM74ALS37A Quadruple 2-Input NAND Buffer Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin for pin compatible with LS TTL counterpart Improved AC performance over LS37 Improved line receiving characteristics

Mali-400

Contextual Info: Allwinner Technology CO., Ltd. A13 User Manual V1.2 2013.01.08 A13 Allwinner Technology CO., Ltd. A13 Revision History Version Date Author V1.0 2012.04.16 Initial version V1.1 2012.10.25 Modify SDRAM/NAND module descriptions V1.2 2013.1.8 A13 User Manual V1.2

Contextual Info: SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SDAS187A – APRIL 1982 – REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

S691 oscillator

Abstract: 74hc 4514 ap HC4078 HC592A 4017 timer ic HC593A S688 LS194A HC165A 4017 Decade Counter IC
Contextual Info: 2. HIGH SPEED CMOS SELECTION GUIDE NAND NOR AND OR INVERTER,BUFFER EXCLUSIVE OR/NOR SCHMITT TRIGGER MULTI FUNCTION LEVEL SHIFTER RTIQ RlIFPfT} HCOOA HCTOOA HC03A HC10A HC20A HC30A HC132A HC133A HC02A HCT02A HC27A HC4002A HC4078A HC08A HCT08A HC09A HCUA HC21A

MTFC4G

Abstract: MTFC16G micron emmc MTFC32G micron eMMC 100 ball BGA MTfc8g emmc csd MTFC4 micron emmc 4.4 MTFC16GKQDI
Contextual Info: 4GB, 8GB, 16GB, 32GB: e•MMC Features e·MMC Memory MTFC4GGQDM, MTFC4GGQDI, MTFC8GKQDI, MTFC16GKQDI, MTFC32GKQDH Features Figure 1: Micron e·MMC Device • MultiMediaCard MMC controller and NAND Flash • 153-ball FBGA or 169-ball FBGA (6/6 RoHS-compliant)

SAMSUNG MCP

Abstract: KBB05A500 transistor BA29 BA102 NAND FLASH BGA transistor ba47 Pre-programming nand samsung UtRAM Density BA841 BGA-100
Contextual Info: KBB0xA500M - T402 MCP MEMORY Document Title Multi-Chip Package MEMORY 64M Bit 8Mx8/4Mx16 Dual Bank NOR Flash *2 / 128M Bit (8Mx16) NAND Flash / 64M Bit (4Mx16) UtRAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft October 15, 2002

SAMSUNG MCP

Abstract: samsung toggle mode NAND ba7810 BA102 NAND FLASH BGA UtRAM Density BA5101 BA340 BGA-60
Contextual Info: SEC Only MCP MEMORY KAB0xD100M - TxGP Document Title Multi-Chip Package MEMORY 64M Bit 8Mx8/4Mx16 Dual Bank NOR Flash / 128M Bit (8Mx16) NAND Flash / 32M Bit (2Mx16) UtRAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft March 20, 2002

SAMSUNG MCP

Abstract: ECH information KBB0xB400M BA102 ba4901 UtRAM Density BA5101 samsung NAND memory BGA180 ba30 transistor
Contextual Info: Preliminary MCP MEMORY KBB0xB400M Document Title Multi-Chip Package MEMORY 64M Bit 8M x8/4M x16 Dual Bank NOR Flash *2 / 256M Bit (16Mx16) NAND Flash / 64M Bit (4Mx16) UtRAM Revision History Revision No. History 0.0 Initial Draft (64M NOR Flash M-die_rev1.1)

7400N

Abstract: 2 input nand gate 24v D1113 FJH131 FJHI36 6400N FIH131 FJH131A FJH136 2 input nor gate 24v
Contextual Info: T.T.L. QUADRUPLE 2-INPUT NAND GATES Correspond to 74 Series types 7400N, 6400N FIH13 1 FJHI3IA FJHI36 T ENTATIVE DATA T h e s e d e v ic e s a r e t r a n s i s t o r - t r a n s i s t o r lo g ic q u a d ru p le 2 -in p u t NAND g a te s in th e F J s e r i e s of in te g r a te d c i r c u i t s . T h e F JH 131 c o r r e s p o n d s to '7 4 S e r i e s 't y p e 7400N,

74LS00D

Abstract: 74S00N 74LS00DN 74LS00N specification of 74ls00 7400 signetics TTL 74S00D 74LS00 fan-out 7400n 7400 quad NAND pin configuration
Contextual Info: Signetics 1 74 0 0 , Lsoo, soo Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE 7400 7 4 LS00 74S00 TYPICAL SUPPLY CURRENT TOTAL 9ns 8mA 9 .5 n s 1 .6 m A 3ns 15m A ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; TA = 0°C to + 70°C

Contextual Info: & Semiconductor February 1988 CD4023BM/CD4023BC Buffered Triple 3-Input NAND Gate CD4025BM/CD4025BC Buffered Triple 3-Input NOR Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source

H26M* hynix

Abstract: Hynix eMMC 4.5 controller hynix emmc H26M3100 FBGA153 H26M4 FBGA169 H26M31001FPR Hynix eMMC 5.1 controller h26m5
Contextual Info: 26nm 32Gb based e-NAND product Family This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.1 / Apr. 2011 1 Document Title