NAND GATES Search Results

mc14569

Abstract: mc14094b MC14024B MC14555B
Contextual Info: CMOS Selection Guide by Function Device NAND Gates MC14011B MC14011UB MC14093B MC14023B Function Page Quad 2−Input NAND Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Quad 2−Input NAND Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

751A-03

Abstract: 74AC ACT132 MC74AC132 MC74ACT132 74ACT132
Contextual Info: MC74AC132 MC74ACT132 Quad 2ĆInput NAND Schmitt Trigger QUAD 2-INPUT NAND SCHMITT TRIGGER The MC74AC/74ACT132 contains four 2-input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have greater noise margin than conventional NAND gates.

Contextual Info: 54LS20,DM54LS20,DM74LS20 54LS20 DM54LS20 DM74LS20 Dual 4-Input NAND Gates Literature Number: SNOS291A 54LS20 DM54LS20 DM74LS20 Dual 4-Input NAND Gates General Description Features This device contains two independent gates each of which performs the logic NAND function

Contextual Info: 54F20,74F20 54F20 74F20 Dual 4-Input NAND Gate Literature Number: SNOS172A 54F 74F20 Dual 4-Input NAND Gate General Description This device contains two independent gates each of which performs the logic NAND function Commercial Package Number Military N14A

Contextual Info: 54LS10,DM54LS10,DM74LS10 54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates Literature Number: SNOS277A 54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function

DM74S20

Abstract: DM74S20N MS-001 N14A
Contextual Info: DM74S20 Dual 4-Input NAND Gate August 1986 Revised April 2000 DM74S20 Dual 4-Input NAND Gate General Description This device contains two independent gates each of which performs the logic NAND function. Ordering Code: Order Number DM74S20N Package Number

DM7420N

Abstract: DM7420 MS-001 N14A
Contextual Info: DM7420 Dual 4-Input NAND Gate August 1986 Revised July 2001 DM7420 Dual 4-Input NAND Gate General Description This device contains two independent gates each of which performs the logic NAND function. Ordering Code: Order Number DM7420N Package Number N14A

DM74S40

Abstract: DM74S40N MS-001 N14A
Contextual Info: DM74S40 Dual 4-Input NAND Buffer August 1986 Revised April 2000 DM74S40 Dual 4-Input NAND Buffer General Description This device contains two independent gates each of which performs the logic NAND function. Ordering Code: Order Number DM74S40N Package Number

verilog code for Flash controller

Abstract: verilog code for parallel flash memory flash controller verilog code AMBA AXI verilog code NAND FLASH Controller nandflash flash controller verilog NAND Flash memory controller
Contextual Info: IP Core NAND Flash Controller Research Centre “Module” November 2009 IP Core NAND Flash Controller Key Features • DMA-Master NAND Flash memory controller • 8-bit NAND-Flash interface • Hardware checksum calculation • Several memory pages transfer

DM74S10

Abstract: MS-001 N14A
Contextual Info: DM74S10 Triple 3-Input NAND Gate August 1986 Revised April 2000 DM74S10 Triple 3-Input NAND Gate General Description This device contains three independent gates each of which performs the logic NAND function. Ordering Code: Order Number DM74S10 Package Number

DM54L00J

Contextual Info: DM54L00 DM54L00 Quad 2-Input NAND Gates Literature Number: SNOS264A DM54L00 Quad 2-Input NAND Gates General Description This device contains four independent gates each of which performs the logic NAND function Connection Diagram Function Table Dual-In-Line Package

Contextual Info: 54ACTQ10 54ACTQ10 Quiet Series Triple 3-Input NAND Gate Literature Number: SNOS582 54ACTQ10 Quiet Series Triple 3-Input NAND Gate General Description The ’ACTQ10 contains three, 3-input NAND gates and utilizes NSC Quiet Series technology to guarantee quiet output

MM74C00

Abstract: MM74C00N MM54C00 MM54C02 MM54C04 MM54C10 MM54C20 MM74C02 MM74C04 MM74C10
Contextual Info: MM54C00 MM54C02 MM54C04 MM54C10 MM54C20 MM74C00 Quad 2-Input NAND Gate MM74C02 Quad 2-Input NOR Gate MM74C04 Hex Inverter MM74C10 Triple 3-Input NAND Gate MM74C20 Dual 4-Input NAND Gate General Description Features These logic gates employ complementary MOS CMOS to

0342 fan

Abstract: 74F132 N74F132D N74F132N NAND Qualification Reliability
Contextual Info: INTEGRATED CIRCUITS 74F132 Quad 2-input NAND Schmitt trigger Product specification IC15 Data Handbook Philips Semiconductors 1991 Jun 26 Philips Semiconductors Product specification Quad 2-input NAND Schmitt trigger 74F132 DESCRIPTION PIN CONFIGURATION The 74F132 contains four 2-input NAND gates which accept

Contextual Info: 54AC10 54AC10 Triple 3-Input NAND Gate Literature Number: SNOS080 54AC10 Triple 3-Input NAND Gate General Description The ’AC10 contains three, 3-input NAND gates. Features n Outputs source/sink 24 mA n Standard Military Drawing SMD — ’AC10: 5962-87610

Contextual Info: Quad 2ĆInput NAND Schmitt Trigger The MC74AC/74ACT132 contains four 2-input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have greater noise margin than conventional NAND gates.

74ac132

Abstract: AC132G ACT132G 74AC ACT132 MC74AC132 MC74AC132N MC74ACT132 SOEIAJ-14 MC74AC132NG
Contextual Info: MC74AC132, MC74ACT132 Quad 2−Input NAND Schmitt Trigger The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates.

AC132G

Abstract: ACT132G 74ac132 74act132 AC-132G act132 on 74AC ACT132 MC74AC132 MC74AC132N
Contextual Info: MC74AC132, MC74ACT132 Quad 2−Input NAND Schmitt Trigger The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates.

Contextual Info: Sem iconductor MM54C00/MM74C00 MM54C02/MM74C02 MM54C04/MM74C04 MM54C10/MM74C10 MM54C20/MM74C20 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter Triple 3-Input NAND Gate Dual 4-Input NAND Gate General Description Features These logic gates employ complementary MOS CMOS to

t 5877

Abstract: MM74C00 cmos 74C mm74coon MM54C00 MM74C10 MM54C10J inverter /t 5877
Contextual Info: MM54C00/MM74C00 MM54C02/MM74C02 MM54C04/MM74C04 MM54C10/MM74C10 MM54C20/MM74C20 February 1988 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter Triple 3-Input NAND Gate Dual 4-Input NAND Gate General Description Features These logic gates employ complementary MOS CMOS to

C04011A

Abstract: RCACD4011 RCA-CD4011A rrk 21 C04011
Contextual Info: CD4011A, CD4012A, CD4023A Typ s COS/MOS NAND Gates Quad 2 Input - CD4011A Dual 4 Input - CD4012A Triple 3 Input - CD4023A The RCA-CD4011A, CD4012A, and CD4023A NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing

AC132G

Contextual Info: MC74AC132, MC74ACT132 Quad 2−Input NAND Schmitt Trigger The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates.

TTL 740 NAND propagation delay

Abstract: MM74C201
Contextual Info: MM54C00/MM74C00 MM54C02/MM74C02 MM54C04/MM74C04 MM54C10/MM74C10 MM54C20/MM74C20 February 1988 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter Triple 3-Input NAND Gate Dual 4-Input NAND Gate General Description Features These logic gates employ complementary MOS CMOS to

ACT132

Contextual Info: MC74AC132, MC74ACT132 Quad 2-Input NAND Schmitt Trigger The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates.