NOR SCHMITT MOS Search Results
NOR SCHMITT MOS Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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7UL1G02NX |
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One-Gate Logic(L-MOS), 2-Input/NOR, XSON6, -40 to 125 degC |
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TC7SZ02F |
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One-Gate Logic(L-MOS), 2-Input/NOR, SOT-25 (SMV), -40 to 125 degC |
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TC7SET02FU |
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One-Gate Logic(L-MOS), 2-Input/NOR, SOT-353 (USV), -40 to 125 degC |
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TC7SH02FU |
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One-Gate Logic(L-MOS), 2-Input/NOR, SOT-353 (USV), -40 to 125 degC |
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7UL1G02FS |
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One-Gate Logic(L-MOS), 2-Input/NOR, SOT-953 (fSV), -40 to 125 degC |
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NOR SCHMITT MOS Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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74AUP1G02GW
Abstract: 74AUP1G02 74AUP1G02GF 74AUP1G02GM
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74AUP1G02 74AUP1G02 74AUP1G02GW 74AUP1G02GF 74AUP1G02GM | |
74AUP2G02
Abstract: 74AUP2G02DC JESD22-A114E JESD78
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74AUP2G02 74AUP2G02 74AUP2G02DC JESD22-A114E JESD78 | |
74AUP2G02
Abstract: 74AUP2G02DC
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74AUP2G02 74AUP2G02 74AUP2G02DC | |
Contextual Info: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 5 — 2 December 2011 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
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74AUP2G02 74AUP2G02 | |
Contextual Info: 74AUP1G02 Low-power 2-input NOR gate Rev. 4 — 15 November 2011 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
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74AUP1G02 74AUP1G02 | |
Contextual Info: 74AUP1G02 Low-power 2-input NOR gate Rev. 5 — 16 February 2012 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
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74AUP1G02 74AUP1G02 | |
Contextual Info: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 7 — 4 February 2013 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
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74AUP2G02 74AUP2G02 | |
Contextual Info: 74AUP1G02-Q100 Low-power 2-input NOR gate Rev. 1 — 4 June 2014 Product data sheet 1. General description The 74AUP1G02-Q100 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
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74AUP1G02-Q100 74AUP1G02-Q100 74AUP1G02 | |
Contextual Info: 74AXP1G02 Low-power 2-input NOR gate Rev. 1 — 25 August 2014 Product data sheet 1. General description The 74AXP1G02 is a single 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire |
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74AXP1G02 74AXP1G02 | |
Contextual Info: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 6 — 3 August 2012 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V o 3.6 V. |
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74AUP2G02 74AUP2G02 | |
Contextual Info: 74AUP1G02 Low-power 2-input NOR gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. |
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74AUP1G02 74AUP1G02 | |
Contextual Info: 74AUP1G02 Low-power 2-input NOR gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. |
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74AUP1G02 74AUP1G02 | |
Contextual Info: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 6 — 3 August 2012 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V o 3.6 V. |
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74AUP2G02 74AUP2G02 | |
Contextual Info: 74AXP1G58 Low-power configurable multiple function gate Rev. 2 — 24 July 2014 Product data sheet 1. General description The 74AXP1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, |
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74AXP1G58 74AXP1G58 | |
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Contextual Info: 74AXP1G58 Low-power configurable multiple function gate Rev. 1 — 25 June 2013 Preliminary data sheet 1. General description The 74AXP1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, |
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74AXP1G58 74AXP1G58 | |
Contextual Info: 74AXP1G57 Low-power configurable multiple function gate Rev. 1 — 25 June 2013 Preliminary data sheet 1. General description The 74AXP1G57 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, |
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74AXP1G57 74AXP1G57 | |
74AUP1G02GW
Abstract: JESD22-A114-C MO-203 74AUP1G02 74AUP1G02GF 74AUP1G02GM
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74AUP1G02 74AUP1G02 74AUP1G02GW JESD22-A114-C MO-203 74AUP1G02GF 74AUP1G02GM | |
14671
Abstract: 74AUP1G02 74AUP1G02GM 74AUP1G02GW JESD22-A114-C MO-203
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74AUP1G02 74AUP1G02 14671 74AUP1G02GM 74AUP1G02GW JESD22-A114-C MO-203 | |
54ACS245S
Abstract: 54ACS245 54ACS 5962H9657202VXC 301CL qml-38535 UT54ACS245UVAH octal schmitt 5962H9657202VXA
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5962-R259-97. UT54ACS245S-Q 54ACS245S 54ACS245 54ACS 5962H9657202VXC 301CL qml-38535 UT54ACS245UVAH octal schmitt 5962H9657202VXA | |
Contextual Info: 74AUP2G02 Low-power dual 2-input NOR gate Rev. 01 — 28 August 2006 Product data sheet 1. General description The 74AUP2G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
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74AUP2G02 74AUP2G02 | |
Contextual Info: 74AUP1G02 Low-power 2-input NOR gate Rev. 02.mm — 16 May 2006 Product data sheet 1. General description The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
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74AUP1G02 74AUP1G02 | |
74AUP2G02
Abstract: 74AUP2G02DC 74AUP2G02GM JESD22-A114E JESD78
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74AUP2G02 74AUP2G02 74AUP2G02DC 74AUP2G02GM JESD22-A114E JESD78 | |
specifications of transistor AC126
Abstract: 74 Series Logic ICs gate diagrams octal Bilateral Switches specifications of AC126 TC4000 series CMOS Logic ICs inverter TC74HC(T)XXXAP 74HC octal bidirectional latch specifications transistor AC126 VHCV541 TC7PZ17FU
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2010/9SCE0004K 74VHC, TC74AC/ACTxxx TC74VHC/VHCT/VHCVxxx ACT00, ACT02 ACT08, ACT32 VHC00, VHCT00A, specifications of transistor AC126 74 Series Logic ICs gate diagrams octal Bilateral Switches specifications of AC126 TC4000 series CMOS Logic ICs inverter TC74HC(T)XXXAP 74HC octal bidirectional latch specifications transistor AC126 VHCV541 TC7PZ17FU | |
quad dual input nand schmitt mos
Abstract: c17 dual mos 4030B 4085B 40098B 40097B 4069UB nor schmitt mos
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40098B 4030B, 4070B 4077B 4085B quad dual input nand schmitt mos c17 dual mos 4030B 4085B 40098B 40097B 4069UB nor schmitt mos |