NS 4248 Search Results

HD6417709A

Abstract: hd64f7044 GC80503CS166EXT GC80503CSM66266 pic16f877 sine pwm lcd interface with at89c2051 intel 80486dx4 80386extc HD6417707 HD6417020
Contextual Info: INDEX Subjects Products Suppliers Page 1. CPU & PERIPHERAL Embedded Processor Microcontroller CPU Peripherals DSP Voice Recognition Motorola / NS / Hitachi / Intel Atmel / Intel / Motorola / Hitachi / NS / Microchip NS / Intersil / Intel Motorola Sensory 2-10

Contextual Info: A m 9 1 5 1 1 02 4 x 4 Registered Static RAM with SSR — On-Chip Diagnostics Capability DISTINCTIVE CHARACTERISTICS • High Speed - 40 ns cycle time 25 ns Max. setup and 15 ns Max. clock-to-output • On-chip high-speed parallel register for pipelined systerns

ns 4249

Abstract: ns 4248
Contextual Info: Am27S55 32,768-Bit 4 0 9 6 x 8 Bipolar Registered PROM ADVANCE INFORMATION > 3 DISTINCTIVE CHARACTERISTICS "A " version offers superior performance with 20 ns set­ up time and 10 ns clock-to-output delay Slim, 24-pin, 300-mil lateral center package occupies

Contextual Info: Am27S55 32,768-Bit 4 0 9 6 x 8 Bipolar Registered PROM ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS • "A " version offers superior performance with 20 ns set­ up time and 10 ns clock-to-output delay • Slim, 24-pin, 300-mil lateral center package occupies

Contextual Info: Am 27S55 32,768-Bit 4096 x 8 Bipolar Registered PROM Am27S55 ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS • • • " A " version offers superior perform ance w ith 20 ns set­ up time and 10 ns clock-to-output delay Slim, 24-pin, 300-mil lateral center package occupies

29057

Abstract: intel 4269
Contextual Info: 28F002BC 2-MBIT 256K X 8 BOOT BLOCK FLASH MEMORY • High Performance Read — 80/120 ns Max. Access Time 40 ns Max. Output Enable Time a Low Power Consumption — 20 mA Typical Read Current ■ x8-Only Input/Output Architecture — Space-Constrained 8-bit

Contextual Info: □ ANALOG DEVICES FEATURES Usable Closed-Loop Gain Range: ±1 to ±40 Low Distortion: -6 7 dBc 2nd at 20 MHz Small Signal Bandwidth: 190 MHz (Av = +3) Large Signal Bandwidth: 150 MHz at 4 V p-p Settling Time: 10 ns to 0.1%; 14 ns to 0.02% Overdrive and Output Short Circuit Protected

BED02

Abstract: DM648 layout DM648 BED09 POWER INDICATE AUTO OFF TIMER CIRCUIT 87a4 BED01 hr 8768 PCI 9054 Detailed Technical Specifications TMS320DM648 dsp application
Contextual Info: TMS320DM647/TMS320DM648 Digital Media Processor www.ti.com SPRS372 – MAY 2007 1 TMS320DM647/TMS320DM648 Digital Media Processor • • • High-Performance Digital Media Processor DM647/DM648 – 720, 900-MHz C64x+ Clock Rate – 1.39, 1.11-ns Instruction Cycle Time

ph 4148

Abstract: pin DIAGRAM OF IC 7400 ph 4148 diode 7400 pin configuration Space Qualified VCXO data sheet IC 7400 SMPTE296 8038 ic tester circuit diagram AES-3 data sheet 7400 IC
Contextual Info: www.ti.com TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269 – FEBRUARY 2005 1 TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor 1.1 • • • • • • Features High-Performance Digital Media Processor – 2-, 1.67-ns Instruction Cycle Time

Contextual Info: www.ti.com TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269 – FEBRUARY 2005 1 TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor 1.1 • • • • • • Features High-Performance Digital Media Processor – 2-, 1.67-ns Instruction Cycle Time

Contextual Info: www.ti.com TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269 – FEBRUARY 2005 1 TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor 1.1 • • • • • • Features High-Performance Digital Media Processor – 2-, 1.67-ns Instruction Cycle Time

8237 interface with 8086 Peripheral block diagram

Contextual Info: OAK TECHNOLOGY INC OTI-031 IBM PS/2 MODEL 30-COMPATIBLE SYSTEM CONTROLLER FEATURES DESCRIPTION • Supports 8086 or V30 CPU speed at 8 MHz or 10 MHz with zero wait state using 150 ns DRAMs The OTI-031 provides the PS/2 Model 30-compatible system with the dual

interfacing of 8237 with 8086

Abstract: nec v30 8237 interface with 8086 Peripheral block diagram interfacing of memory devices with 8086 V30 CPU vl82c laptop HARD DISK CIRCUIT diagram RD3F OTI-037 02F8-02FF
Contextual Info: OAK TECHNOLOGY INC OTI-031 IBM PS/2 MODEL 30-COMPATIBLE SYSTEM CONTROLLER FEATURES DESCRIPTION • Supports 8086 or V30 CPU speed at 8 MHz or 10 MHz with zero wait state using 150 ns DRAMs The OTI-031 provides the PS/2 Model 30-compatible system with the dual

nec v30

Abstract: V30 CPU vl82c0 vl82c031
Contextual Info: VLSI T e c h n o l o g y , in c . VL82C031 SUPER XT-COMPATIBLE SYSTEM CONTROLLER FEATURES DESCRIPTION • Supports 8086 or V30 CPU at 8 MHz or 10 MHz zero wait state using 150 ns DRAMs The VL82C031 provides the XT-com ­ patible system with dual speed control,

nec 424800

Abstract: ic 2716 ic2716 PD42S4800-70 424800-10 424800-80 TXXXXXXXXXX
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT jU P D 4 2 S 4 8 0 0 , 4 2 4 8 0 0 4 M -BIT D Y N A M IC R A M 512 K -W O R D B Y 8-BIT, F A S T P A G E M O D E D e s c rip tio n The /¿PD42S4800, 424800 are 524,288 words by 8 bits CMOS dynamic RAMs. The fast page mode capability

S4800L

Abstract: nec 424800 zx3A PD42S4800 tda 1006 D424800
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT //PD42S4800, 424800 4 M-BIT DYNAMIC RAM 512 K-WORD BY 8-BIT, FAST PAGE MODE Description The iiP042S 4800, 424800 are 524,288 words by 8 bits CMOS dynamic RAM s. The fast page mode capability realize high speed access and low power consumption.

Contextual Info: DATA SHEET M O S INTEGRATED CIRCUIT /1PD42S4800, 424800 4 M-BIT DYNAM IC RAM 512 K-WORD BY 8-BIT, FA ST PAGE M ODE Description The /¿PD42S4800, 424800 are 524,288 words by 8 bits dynamic CMOS RAMs. The fast page mode capability realize high speed access and low power consumption.

nec 424800

Abstract: RAS 0501
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT / /¿ P D 4 2 S 4 8 0 0 , 4 2 4 8 0 0 4 M-BIT DYNAMIC RAM 512 K-WORD BY 8-BIT, FAST PAGE MODE Description The /¿PD42S4800, 424800 are 524,288 words by 8 bits CMOS dynamic RAMs. The fast page mode capability realize high speed access and low power consumption.

nec 424800

Abstract: UPD42S4800-70 ic 2716
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD42S4800, 424800 4 M-BIT DYNAMIC RAM 512 K-WORD BY 8-BIT, FAST PAGE MODE Description The µPD42S4800, 424800 are 524,288 words by 8 bits CMOS dynamic RAMs. The fast page mode capability realize high speed access and low power consumption.

UPD42S4800-70

Abstract: 42s4800 uPD424800 nec 42s4800 42S4800LE-70 UPD424800-70
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT ¿¿PP42S4800, 424800 4 M-BIT DYNAMIC RAM 512 K-WORD BY 8-BIT, FAST PAGE MODE Description The jjPD42S4800, 424800 are 524,288 w ords by 8 bits CMOS dynam ic RAMs. The fa st page mode capability realize high speed access and low power consum ption.

42S4800LE-70

Abstract: 424800-70 trw 8102 UPD424800
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT /¿PD42S4800, 424800 4 M BIT DYNAMIC RAM 512 K-WORD BY 8-BIT, FAST PAGE MODE Description The /iPD42S4800, 424800 are 524,288 words by 8 bits dynam ic CMOS RAMs. The fast page mode capability realize high speed access and low power consum ption.

424800-70

Abstract: 424800 424800-80 UPD42S4800-70 uPD42 PD42S4800 424800g5 UPD424800LE-60
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD42S4800, 424800 4 M-BIT DYNAMIC RAM 512 K-WORD BY 8-BIT, FAST PAGE MODE Description The µ PD42S4800, 424800 are 524,288 words by 8 bits CMOS dynamic RAMs. The fast page mode capability realize high speed access and low power consumption.

42S4800-70

Abstract: PD42S4800 28/nec 42s4800
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT UPD42S4800, 424800 4 M-BIT DYNAMIC RAM 512 K-WORD BY 8-BIT, FAST PAGE MODE Description The JUPD42S4800, 424800 are 524,288 words by 8 bits CMOS dynamic RAMs. The fast page mode capability realize high speed access and low power consumption.

Contextual Info: NEC DATA SHEET MOS INTEGRATED CIRCUIT juPD42S4805A, 424805A 4 M-BIT DYNAMIC RAM 512 K-WORD BY 8-BIT, HYPER PAGE MODE Description The ftPD42S4805A, 424805A are 524 288 words by 8 bits dynamic CMOS RAMs with optional hyper page mode. Hyper page mode is a kind of page mode and is useful for the read operation.