OF256 Search Results

Contextual Info: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227C - FEBRUARY 1993 - REVISED FEBRUARY 1996 • Member of the Texas Instruments Wldebus Family • Independent Asynchronous Inputs and Outputs • Input-Ready, Output-Ready, and Half-Full Flags

Contextual Info: ICS5340 GENDAC Integrated Circuit Systems, Inc. 16-Bit Integrated Clock-LUT-DAC General Description Features The ICS5340 GENDAC is a combination of dual p ro ­ gram m able clock generators, a 256 x 18-bit RAM, and a triple 8-bit video DAC. The GENDAC supports 8-bit

TAG L7

Abstract: fpu coprocessor PR31 PR3400 PR3000A mps 1136 TAG 93
Contextual Info: PaceMips" PR3400N CPU 32-BIT RISC PROCESSOR WITH FLOATING POINT ACCELERATOR FEATURES • CPU and FPA in a monolithic VLSI package ■ 32-BIT RISC Processor PaceMips PR3000A that contains thiity-two general purpose 32-bit registers ■ On-Chip Memory Management Unit provides fast

ITE 8721

Abstract: fnd 503 7-segment TAA 2761 A 486 motherboard schematic 3860S 486dx isa bios pin assignment RAS 0510 cxd 9897 tn ti77 k244
Contextual Info: ISA/486 C H |p g . CepyTlgtt N ette S o t t r a e C o p y ñ f tt O 1962, a * « * d T e d » a i e s i e * . l w x M t o n i I C o p y r i i h t O 1992 . Q ñ p » » d T c c t n o f a p B » , ! ^ . A B SIduR am i Poned ib UJ5A. Tw dw u U t h w lw lgim iil

ICS5300

Abstract: FBIR1
Contextual Info: ICS5300 GENDAC Integrated A Circuit Systems, Inc. Preliminary 8-bit Integrated Clock-LUT-DAC General Description Features The ICS5300 GENDAC is a combination of dual program ­ m able clock generators, a 256 x 18-bit RAM, and a triple 8-bit video DAC. The GENDAC supports 8-bit pseudo

AT40498

Contextual Info: AT40498 Features • One-Chip PC/AT Compatible Core Logic Controller for 80486 Systems Operating Up to 66 MHz. One 208-Pin Quad Flatpack, Sub-Micron CMOS Technology Direct Mapped Write-Back Cache Controller with Burst Fill Programmable 2-1-1-1,3-1-1-1,2-2-2-2 and 3-2-2-2 Cache Burst Cycles

Contextual Info: ADVANCE 4 MEG X 64 DRAM SODIMM M IC R O N I TF.CHNOLOOY, INC. SMALL-OUTLINE DRAM MODULE MT4LDT464H X S FEATURES PIN ASSIGNMENT (Front View) • JEDEC- and industry-stand ard pinout in a 144-pin, sm all-outline, dual in-line m em ory m odule (DIMM) • 32MB (4 M eg x 64)

schematic diagram cga to vga converter

Abstract: mda to vga converter schematic diagram cga to vga 640x400 el display cga ega to vga converter cga to vga circuits plasma 640x400 schematic diagram RGB to vga converter cga to vga converter circuits cga to vga converter
Contextual Info: S-M 0 S SYSTEMS INC 5bE J> m 7^32^0^ DDD1573 0T7 H S F1 0 SPC8100 LOW POWER LCD/CRT VGA CONTROLLER • DESCRIPTION The SPC8100Foa is a single chip multi-function Low Power LCD & CRT VGA Controller with an integrated RAMDAC and Liquid Crystal Display interface. The controller's unique architecture allows a fully VGA

TA73G8P

Abstract: T6668 mioz3 T70 No3 T6668-3 T6668-16 256KD T6668-6 F/TA73G8P dSMC
Contextual Info: b4E » • 00EMTM2 TOSHIBA 1. S i b WÊTQS3 UC/UP GENERAL The T6668 is a single chip CMOS LSI for voice recording and reproducing using the ADM (Adaptive Delta Modulation) system. When a dynamic RAM is used as a voice data memory and an audio circuit including a microphone, speaker, amplifier, etc. is externally connected, a voice

80386 microprocessor pin out diagram

Abstract: microprocessor 80386 pin out diagram block diagram of 80386 microprocessor 80386 microprocessor architecture 80386 microprocessor interface keyboard monitor gigabyte MOTHERBOARD CIRCUIT diagram MA intel 80386 motherboard, 80386 microprocessor functional block diagram 80386 microprocessor interface keyboard pin out of 80386 microprocessor
Contextual Info: Advance Information FE6010 DMA and Channel Control Logic Completely compatible with the IBM Personal □ Micro Channel* Arbitration Control Logic System/2* Models 70 and 80 □ Functionality equivalent to two 8237 DMA con­ Configurable for systems based on the 80386

circuit TOP 242 PN

Abstract: SN74ACT7811 SN74ACT7881 SN74ACT7882 SN74ACT7884 7s26a
Contextual Info: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS2 2 7 B - FE BH UA HY 1 9 9 3 - REVISED O CTO BER 1994 • Member of the Texas Instruments Wldebus Family • Independent Asynchronous Inputs and Outputs • Read and Write Operations Can Be Synchronized to Independent System

pic16f876 usart assembly code example

Abstract: PIC16f876 usart init example p16F876 mastri2c.inc 16F873 PIE1 A8085 temperature MPASM ADM9240 C103
Contextual Info: Pentium III Processor Active Thermal Management Techniques Application Note August 2000 Order Number: 273405-001 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual

C1951

Abstract: ICS53
Contextual Info: ICS5340 GENDAC Integrated Circuit Systems, Inc. 16-Bit Integrated Clock-LUT-DAC General Description Features The ICS5340 GENDAC is a combination of dual pro­ gram m able clock generators, a 256 x 18-bit RAM, and a triple 8-bit video DAC. The GENDAC supports 8-bit

518221

Contextual Info: O K I Semiconductor M SM 518221 262,214-Word x 8-Bit Field Memory DESCRIPTION The OKI MSM518221 is a high performance 2-Mbit, 256K x 8-bit, Field Memory. It is designed for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital movies

Contextual Info: HY5216256 Series -HYUNDAI 256Kx 16-bit Video RAM with 2CAS Introduction Overview The 4megabit Video RAM is an application specific memory device designed for graphics applications. It comprises a 256k x16 DRAM memory array interfaced to a 256 x16 Serial Access Memory SAM , or register.

cd 1191 acb

Abstract: crystal oscillator 8mhz ntk tl38a 82C356 SI-111J CS82310 387DX WK2C mip 2F3 82C351
Contextual Info: PEAK/DM Data Book February 1991 Copyright Notio« Software Copyright ê 1991, CHIPS and Technologies, Inc. Manual Copyright 1991, CHIPS and Technologies, Inc. All Rights Reserved. P tizüed in U.S.A. Trademarks PEAK , PEAK/DM™ and PEAK/5X™ are trademarks ofCHIPS and Technologies,

f82c235

Abstract: a19t 82C765 82C235 1NTC0 LG lcd tv tuner 80286 microprocessor schematics 82C601 82c710 sues 1132
Contextual Info: 82C235 System Controller $ ' >"•' fipÉlI «V M M V // S A V A A >V * A * ^ÿV IV fWJ V ÿ . # v . . v K M ^ 0v . 4 v w v v W/ s Single CHIP 286 AT m fÊ P R E L I M I / N A R Y CH!PS* Copyright Nolle* Manual Copyright C 1991, CHIPS aad Technologies. Ine.

block diagram of 80386 microprocessor

Abstract: 80386SX microprocessor pin out diagram pvga1a 80387
Contextual Info: WESTERN DIGITAL CORP EIE D • “1710520 000blS3 b ■ T-sl*h-\0\ Advance Information FE6010 DMA and Channel Control Logic Completely compatible with the IBM Personal □ Micro Channel* Arbitration Control Logic System/2* Models 70 and 80 □ Functionality equivalent to two 8237 DMA con­

Contextual Info: MOSEL- VITEUC M S76502A 2 5 6 x 16 B I-D IR E C TIO N A L F IFO W ITH P A R IT Y G ENER A TO R /C H EC K ER Features Description • ■ ■ ■ The MS76502A is an asynchronous 256 x 16 BiFlFO using a dual port RAM based architecture. The MS76502 has two 16-bit bi-directional data

CH8398

Abstract: CH8398A STG1703 TQD4133 stg170
Contextual Info: CH8398A CHRONTEL True-Color ChronDAC with 16-bit Interface Features Description • 16-bit pixel bus interface On-chip clock doubler Three high speed 8-bit 110/135 MHz DACs Three high speed 256 x 6-bit color palette RAMs Compatible with ATT20C498 display modes

AT24C04-10PI-2.7

Abstract: 10PI1 AT24C04N10SI AT24C04N-10SI AT24C16
Contextual Info: AT24C01A/2/4/8/16 Features • Low Voltage and Standard Voltage Operation 5.0 Vcc = 4.5 V to 6.0 V 3.0 (Vcc = 2.7 V to 6.0 V) 2.5 (VCC = 2.5 V to 6.0 V) 2.0 (VCC = 18 V to 6.0 V) • Internally Organized 128 * 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K)

B33A10

Abstract: R6095 Q031 THOMSON-CSF PRODUCTS A24C11
Contextual Info: 's i m m m ê m m m w m m TSPC860 ü b 32 BIT QUAD INTEGRATED POWER QUICC COMMUNICATION CONTROLLER D ESC RIPTIO N The TSPC860 PowerPC” QUad Integrated Communication Controller Power QUICC™ is a versatile one-chip Integrated microprocessor and peripheral combination that can be used

TGUI9400CXi

Abstract: AM 5766 analog 486DX symphony chip set Tvga9200cxr TGUI9400 TGUI9400CX T304L 512kx4 Tvga 3728 lx data
Contextual Info: T R I D EN T M I C R O S Y S T E M S T GUI 9 4 2 0 DGÎ INC TDD2162 D O O O n D b7E » PRE LI MI NARY DATA SHEET 10T ITRID ^Trident TGUI9420DGÌ INTEGRATED GUI ACCELERATOR General Description Features Hardware acceleration of BitBLTs, line drawing, short stroke vectors, rectangle fills, text transfer ana color

Contextual Info: SN74ACT7811 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY _SCAS151C - JANUAR Y 1981 - R E V IS E D FEBRUARY 1996 • Member of the Texas Instruments Wldebus Family • Input-Ready, Output-Ready, and Half-Full Flags • Independent Asynchronous Inputs and