OPTIMUM RECIEVERS Search Results
OPTIMUM RECIEVERS Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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MC10116FNR2 |
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MC10116 - Triple Line Receiver (R2 is ) |
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AM79866AJC |
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AM79866A - Physical Data Receiver |
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AM79866AJC-G |
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AM79866A - Physical Data Receiver |
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55154J/B |
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55154 - Line Driver/Receiver |
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55142AJ/B |
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55142 - Line Receiver |
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OPTIMUM RECIEVERS Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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CXE-2022
Abstract: MARKING RFMD CXE-2022Z InP transistor HEMT optimum recievers 106-172 106172
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CXE-2022Z 50MHz 1000MHz 1000MHz CXE-2022Z CXE-2022 MARKING RFMD InP transistor HEMT optimum recievers 106-172 106172 | |
CXE2022SR
Abstract: CXE2022PCK-410 CXE2022SB CXE2022SQ CXE2022TR7 CXE2022Z CXE-2022Z amplifier DFN 2x2 MARKING RFMD CXE2022
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CXE-2022Z 50MHz 1000MHz 1000MHz CXE-2022Z CXE2022SR CXE2022PCK-410 CXE2022SB CXE2022SQ CXE2022TR7 CXE2022Z amplifier DFN 2x2 MARKING RFMD CXE2022 | |
RF2817PCBA-410
Abstract: gps schematic diagram micro SD Vdd schematic diagram bluetooth reciever 101p1
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RF2817 RF2817GPS 975mm 86dBc 82dBc DS091215 RF2817PCBA-410 gps schematic diagram micro SD Vdd schematic diagram bluetooth reciever 101p1 | |
MARKING RFMD
Abstract: CXE2022Z CXE2022SR CXE-2022Z inp hemt low noise amplifier CXE-2022 CXE2022PCK-410 CXE2022SB CXE2022SQ CXE2022TR7
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CXE-2022Z 50MHz 1000MHz 1000MHz CXE-2022Z MARKING RFMD CXE2022Z CXE2022SR inp hemt low noise amplifier CXE-2022 CXE2022PCK-410 CXE2022SB CXE2022SQ CXE2022TR7 | |
Contextual Info: RF2817 RF2817GPS Low Noise Amplifier with Integrated Input/Output SAW Filters GPS LOW NOISE AMPLIFIER WITH INTEGRATED INPUT/OUTPUT SAW FILTERS Package: Module, 4.5mmx2.2mmx0.975mm Features VDD Low Noise Figure: 1.80dB |
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RF2817 RF2817GPS 975mm 86dBc 82dBc DS091215 | |
Contextual Info: CXE-2022Z CXE-2022Z 50MHz to 1000MHz MMIC 75 Low Noise Amplifier 50MHz to 1000MHz MMIC 75 LOW NOISE AMPLIFIER Package: 2x2 DFN Product Description Features RFMD’s CXE-2022Z is a 75 high performance low noise pHEMT MMIC amplifier utilizing a self |
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CXE-2022Z 50MHz 1000MHz 1000MHz CXE-2022Z | |
Contextual Info: RF2817 RF2817GPS Low Noise Amplifier with Integrated Input/Output SAW Filters GPS LOW NOISE AMPLIFIER WITH INTEGRATED INPUT/OUTPUT SAW FILTERS Package: Module, 4.5mmx2.2mmx0.975mm Features VDD Low Noise Figure: 1.80dB |
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RF2817 RF2817GPS 975mm 86dBc 82dBc DS091215 | |
Contextual Info: RF2815 RF2815GPS Low Noise Amplifier with Integrated Output SAW Filter GPS LOW NOISE AMPLIFIER WITH INTEGRATED OUTPUT SAW FILTER Package: Module, 3.3 x 2.1 x 1.0 Features Low Noise Figure: 0.85 dB Typ. High Gain: 13.5 dB High IIP3: +9 dBm |
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RF2815 RF2815GPS RF2815 DS090722 | |
Contextual Info: RF2815GPS Low Noise Amplifier with Integrated Output SAW Filter RF2815 Preliminary GPS LOW NOISE AMPLIFIER WITH INTEGRATED OUTPUT SAW FILTER Package: Module, 3.3x2.1x1.0 Features VDD Low Noise Figure: 0.85dB Typ. High Gain: 13.5dB |
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RF2815GPS RF2815 RF2815 DS090220 | |
DS100211Contextual Info: RF2815 RF2815GPS Low Noise Amplifier with Integrated Output SAW Filter GPS LOW NOISE AMPLIFIER WITH INTEGRATED OUTPUT SAW FILTER Package: Module, 3.3x2.1x1.0 Features VDD Low Noise Figure: 0.85dB Typ. High Gain: 13.5dB High IIP3: +9dBm |
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RF2815 RF2815GPS DS100211 DS100211 | |
RF2815
Abstract: optimum recievers RF2185 GPS SAW filter 1200 MHz
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RF2815 RF2815GPS RF2815 DS090604 optimum recievers RF2185 GPS SAW filter 1200 MHz | |
RF2815
Abstract: RF2185 HDR1X4 RF2815GPS Bluetooth reciever
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RF2815 RF2815GPS RF2815 DS100211 RF2185 HDR1X4 RF2815GPS Bluetooth reciever | |
YAGEO CHIP RESISTORS instruction
Abstract: AD9287
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ANSI-644 12-bit, AD9228 MO-220-VKKD-2 48-Lead CP-48-1) AD9228BCPZ-40 AD9228BCPZ-65 AD9228-65EB CP-48 YAGEO CHIP RESISTORS instruction AD9287 | |
AD9287Contextual Info: Preliminary Technical Data Quad 10-bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter AD9219 FEATURES FUNCTIONAL BLOCK DIAGRAM Four ADCs in one package Serial LVDS ANSI-644 ,IEEE 1596.3 reduced range link Data and frame clock outputs SNR = 61 dB (to Nyquist) |
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10-bit, AD9219 ANSI-644 PR05726-0-9/05 MO-220-VKKD-2 48-Lead CP-48-1) AD9219BCPZ-40 AD9219BCPZ-65 AD9219-65EB AD9287 | |
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Contextual Info: IDT74SSTUB32866B 1.8V CONFIGURABLE REGISTERED BUFFER WITH PARITY COMMERCIAL TEMPERATURE RANGE 1.8V CONFIGURABLE BUFFER WITH PARITY FEATURES: • • • • • • • • When used in pairs, the C0 input of the first register is tied low and the C0 input of the second register is tied high. The C1 input of both registers |
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IDT74SSTUB32866B 25-bit 14-bit 100mA MIL-STD-883, 200pF, 410MHz 96spect | |
DDR2-400
Abstract: IDT74SSTU32866B 866b
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IDT74SSTU32866B SSTU32866B SSTU32866B. SSTU32 DDR2-400 IDT74SSTU32866B 866b | |
CSPUA877
Abstract: IDT74SSTUA32866 SSTUA32866
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IDT74SSTUA32866 SSTUA32866 SSTUA32866. 10MHz, SSTUA32 CSPUA877 IDT74SSTUA32866 | |
Contextual Info: IDT74SSTUA32866 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST FEATURES: • • • • • • • • • APPLICATIONS: • Along with CSPUA877 DDR2 PLL, provides complete solution for DDR2 DIMMs |
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IDT74SSTUA32866 IDT74SSTUA32866 25-bit 14-bit 100mA MIL-STD-883, 200pF, 410MHz 96-pin 10MHz, | |
Contextual Info: IDT74SSTU32866B 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST COMMERCIAL TEMPERATURE RANGE IDT74SSTU32866B When used in pairs, the C0 input of the first register is tied low and the C0 input of the second register is tied high. The C1 input of both registers |
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IDT74SSTU32866B SSTU32866B SSTU32866B. SSTU32 | |
Contextual Info: IDT74SSTU32866B 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST FEATURES: COMMERCIAL TEMPERATURE RANGE IDT74SSTU32866B When used in pairs, the C0 input of the first register is tied low and the |
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IDT74SSTU32866B IDT74SSTU32866B 25-bit 14-bit 100mA MIL-STD-883, 200pF, 96-pin CSPU877/A/D DDR2-400 | |
Contextual Info: IDT74SSTUA32866 1.8V CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST 1.8V CONFIGURABLE BUFFER WITH ADDRESSPARITY TEST 1.8V Operation SSTL_18 style clock and data inputs Differential CLK input Configurable as 25-bit 1:1 or 14-bit 1:2 registered buffer |
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IDT74SSTUA32866 25-bit 14-bit 100mA MIL-STD-883, 200pF, 410MHz 96-pin 10MHz, | |
P-VFBGA 49 package
Abstract: ddr ram optimum recievers smd code a12 HYB18M512160BFX P-VFBGA-60-1
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HYB18M512160BFX-7 512-Mbit HYB18M512160BFX 04052006-4SYQ-ZRN3 P-VFBGA 49 package ddr ram optimum recievers smd code a12 HYB18M512160BFX P-VFBGA-60-1 | |
HYB18M512Contextual Info: . Home > Products > Packages > Green Products > Introduction On 27.01.2003 the European Parliament and the council adopted the directives: 2002/95/EC on the Restriction of the use of certain Hazardous Substances in electrical and electronic |
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2002/95/EC 2002/96/EC 04032006-xxxx-xxxx 18M512160BF 512-Mbit P-VFBGA-60-1 HYB18M512 | |
HYB18M512160AF
Abstract: HYE18M512160AF-7 HYE18M512160AF-8
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18M512160AF 512-Mbit P-VFBGA-60-1 HYB18M512160AF HYE18M512160AF-7 HYE18M512160AF-8 |