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    PEEL18CV8P-7 Datasheets (6)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF PDF Size Page count
    PEEL18CV8P-7
    		Anachip -0.5 to 6.0 V, speed 7.5 ns tpd CMOS programmable electrically erasable logic device Original PDF 203.91KB 10
    PEEL18CV8P-7
    		Anachip CMOS Programmable Electrically Erasable Logic Device Original PDF 647.34KB 9
    PEEL18CV8P-7
    		Integrated Circuit Technology SPLD, PEEL18CV8 Family, EECMOS Process, 36 Gates, 12 Macro Cells, 8 Reg., 8 User I/Os, 5V Supply Voltage, 7.5 Speed Grade, 20-DIP Original PDF 321.81KB 10
    PEEL18CV8P-7
    		Unknown CMOS Programmable Electrically Erasable Logic Device Original PDF 335.9KB 10
    PEEL18CV8P-7
    		Integrated Circuit Technology CMOS Programmable Electrically Erasable Logic Device Scan PDF 472.31KB 8
    PEEL18CV8P-7L
    		Anachip CMOS Programmable Electrically Erasable Logic Device Original PDF 647.34KB 9