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    PEEL18LV8ZPI-35 Search Results

    PEEL18LV8ZPI-35 Datasheets (5)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    PEEL18LV8ZPI-35
    		Anachip -0.5 to 6.0 V, speed 35 ns tpd CMOS programmable electrically erasable logic device Original PDF 136.84KB 10
    PEEL18LV8ZPI-35
    		Anachip CMOS Programmable Electrically Erasable Logic Device Original PDF 262.75KB 10
    PEEL18LV8ZPI-35
    		Integrated Circuit Technology 35ns CMOS programmable electrically erasable logic device Original PDF 114.13KB 10
    PEEL18LV8ZPI-35
    		Integrated Circuit Technology SPLD, PEEL18LV8Z Family, EECMOS Process, 36 Gates, 12 Macro Cells, 8 Reg., 8 User I/Os, 3.3V|5V Supply Voltage, 35 Speed Grade, 20-DIP Original PDF 141.78KB 10
    PEEL18LV8ZPI-35L
    		Anachip CMOS Programmable Electrically Erasable Logic Device Original PDF 262.75KB 10