PEEL22CV10AP-7 Search Results
PEEL22CV10AP-7 Datasheets (3)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| PEEL22CV10AP-7 |
|
-0.5 to 7.0 V, speed 7.5 ns tpd CMOS programmable electrically erasable logic device | Original | 184.39KB | 10 | ||
| PEEL22CV10AP-7 | Integrated Circuit Technology | SPLD, PEEL22CV10A Family, EECMOS Process, 44 Gates, 12 Macro Cells, 10 Reg., 10 User I/Os, 3.3V|5V Supply Voltage, 7.5 Speed Grade, 24-DIP | Original | 181.92KB | 10 | ||
| PEEL22CV10AP-7L |
|
CMOS Programmable Electrically Erasable Logic Device | Original | 343.66KB | 10 |