PHL 717 Search Results

TDA 7378

Abstract: TDA 7822 block diagram baugh-wooley multiplier tda 12062 equivalent for tda 4858 ic free transistor equivalent book STD-80 4856 a 14 PIN DIP W908 LSI CMOS Technology
Contextual Info: D • A • T • A • B • O • O • K STD80/STDM80 0.5µm 5V/3.3V Standard Cell Library April 1997 V SAMSUNG SAMSUNG ASIC STD80/STDM80 0.5µm 5V/3.3V Standard Cell Library Data Book  1997 Samsung Electronics Co., Ltd. All rights reserved. No part of this document may be reproduced, in any form or by any means, without the prior

TDA 5660 P

Abstract: sj 2258 PS 9829 WL 10-9123 tda 3377 TDA 5735 tda 7294 pci ck16 Q 371 Transistor TE 555-1 TDA 4920
Contextual Info: STD90/MDL90 0.35µm 3.3V CMOS Standard Cell Library for Pure Logic/MDL Products STD90/MDL90 0.35µm 3.3V CMOS Standard Cell Library for Pure Logic/MDL Products Data Book  2000 Samsung Electronics Co., Ltd. All rights reserved. No part of this document may be reproduced, in any form or by any means, without the prior

STDL80

Contextual Info: JTAG Boundary Scans 7 Contents Overview . 7-1 Boundary Scan Architecture. 7-2

Contextual Info: S i GEC PLESS EY S F M I C O N D U C T O K S DS3594-3.1 54HSC/T Series RADIATION HARD HIGH SPEED CMOS/SOS LOGIC The CMOS/SOS HSC/T Series offer the combined benefits of low power, high speed CMOS with the inherent latch up immunity, Single Event Upset SEU immunity and the high

Contextual Info: P54/74FCÏ193T/AT/CT UP-DOWN BINARY COUNTERS FEATURES • Function, Pinout and Drive Compatible with the FCT and F Logic ■ ESD protection exceeds 2000V ■ Power-off disable feature ■ FCT-C speed at 5.2ns max. Com'l FCT-A speed at 6.5ns max. (Com'l)

HD74LV1GW57A

Abstract: HD74LV1GW57ACME
Contextual Info: HD74LV1GW57A Configurable Multiple–Function Gate REJ03D0081–0100Z Previous ADE-205-717 (Z Rev.1.00 Sep.12.2003 Description The HD74LV1GW57A has configurable multiple–function gate in a 6 pin package. The Output state is determined by eight patterns of 3–bit input. The user can choose the logic functions AND, NAND, NOR,

GD4008B

Abstract: TH501 GD40 GoldStar T-H5-01 4008b
Contextual Info: GOLDSTAR TECHNOLOGY INC-. 4 0 2 8 7 5 7 GOLDSTAR TECHNOLOGY INC. D4E D | 04E M02Û7S7 DDDlbSG =i J / 01620 D T-H5-01 GD4008B 4-BIT BINARY FULL ADDER DESCRIPTION — The 4008B ii a 4-Bit Binary Full Adder with two 4-blt Data inputs AQ-A 3 , BQ-Bg ; a Carry Input (Cq), four Sum Outputs (Sq'Sq) and a Carry Output (C 4 ).

Contextual Info: Philips SemlconductorS'Slgnetlcs D ocum ent No. 853-0097 ECN N o. 92156 D ate of issu e Ja n u ary 2 8 ,1 9 8 8 Status Product Spécification FAST 74F732, 74F733 Multiplexers F A S T Products 74F732 Quad Data Multiplexer, Inverting 3-State 74F733 Quad Data Multiplexer, Non-Inverting (3-State)

Contextual Info: P54/74FCT157T/AT/CT P54/74FCT158T/AT/CT DATA SELECTOR/MULTIPLEXER FEATURES • Function, Pinout and Drive Com patible with the F C T and F Logic ■ FCT-C speed at 4.3ns max. Com 'l FCT-A speed at 5.0ns max. (Com 'l) ■ Reduced V ^ (typically = 3.3V) versions of

Contextual Info: P54/74FCÏ1 93T/AT/CT UP-DOWN BINARY COUNTERS FEATURES • Function, Pinout and Drive Compatible with the FCT and F Logic ■ ESD protection exceeds 2000V ■ FCT-C speed at 5.2ns max. Com'l FCT-A speed at 6.5ns max. (Com’l) ■ Matched Rise and Fall times

Contextual Info: P54/74FCT157T/AT/CT P54/74FCT158T/AT/CT DATA SELECTOR/MULTIPLEXER - FEATURES • Function, Pinout and Drive Compatible with the FCT and F Logic ■ ESD protection exceeds 2000V ■ FCT-C speed at 4.3ns max. Com'l FCT-A speed at 5.0ns max. (Com'l) ■ Matched Rise and Fall times

TC74HC4015A

Contextual Info: TOSHIBA TC74HC40105AP/AF Preliminary FIFO 4-Bit x 16 Word Register The TC74HC4015A is a high speed CMOS 4-bit x 16 word first-in, first-out FIFO Stage Register fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

Contextual Info: <8>MOTOROLA Military 54LS05 Hex 1-Input Inverter Gate MP0 ELECTRICALLY TESTED PER: MIL-M-38510/30004 mm LOGIC DIAGRAM V cc A6 Y6 A5 V5 A4 Y4 AVAILABLE AS: 1 JAN: JM38510/30004BXA 2) SMD: N/A 3)883: 54LS05/BXAJC X = CASE OUTLINE AS FOLLOWS: PACKAGE: CERDIP: C

Contextual Info: National Semiconductor 54F/74F192 Up/Down Decade Counter with Separate Up/Down Clocks General Description The ’F192 is an up/down BCD decade 8421 counter. Sep­ arate Count Up and Count Down Clocks are used, and in either counting mode the circuits operate synchronously.

Contextual Info: 55/75450B • 55/75451B • 55/75452B 55/75453B • 55/75454B DUAL HIGH SPEED PERIPHERAL DRIVERS FAIRCHILD LINEAR INTEGRATED CIRCUITS GENERAL DESCRIPTION - The 55/75450B, 55/75451B, 55/75452B, 55/75453B and 55/75454B are Dual High Speed General Purpose Interface

Contextual Info: SbE rz j J> m 0 0 4 0 3 2 ^ M S 6 T H T - * 1 5 -2 3 -O S SCS-THOMSON M54/74HC692 IMmmtiigTOMS_ M54/74HC693 HC692 DECADE COUNTER/REGISTER 3-STATE HC693 4 BIT BINARY COUNTER/REGISTER (3-STATE) S G S-TH0MS0N • HIGH SPEED fMAX = 33MHz (TYP.) at Vcc - 5V

Contextual Info: 74ACT11646 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCAS061A - 02957. JULY 1987 - REVISED APRIL 1993 DW P A C K A G E TOP VIEW • Independent Registers for A and B Bu ses • Multiplexed Real-Time and Stored Data • Flow-Through Architecture Optimizes

N1702

Abstract: 2N277 2SA63 2N390A L204A 2N408 TFK 940 OC59 2N374 2n1922
Contextual Info: $1.50 Cat. No. SSH-4 TRANSISTOR SUBSTITUTION HANDBOOK by The H ow ard W . Sams Engineering Staff HOWARD W. SAMS & CO., INC. THE BOBBS-MERRILL COMPANY, INC. Indianapolis • New York FIRST EDITION FIRST PR IN T IN G — MARCH, 1961 SECOND PR IN T IN G — MARCH, 1961

54l153

Abstract: SN74L SN741S3 SN741S153 sh54
Contextual Info: TYPES SNS41S3. SN54L153. SN54LS1S3, SN54S153, SN74153, SN74L1S3, SN74LS153, SN74S153 DUAL 4-LINE-T0-1-LINE DATA SELECTORS/MULTIPLEXERS TTL MSI _ B U L L E T IM WO. D L-S 7611862, D E C E M B E R 1972 - R E V IS E D O C T O B E R 1978

mb 3712

Contextual Info: SK10/100EL91W Triple PECL to ECL/LVECL and LVPECL to ECL/LVECL Translator HIGH-PERFORMANCE PRODUCTS Description Features The SK10/100EL91W is a triple PECL to ECL/LVECL and LVPECL to ECL/LVECL translator. It is fully compatible with MC100EL91 and MC100LVEL91. The

mb 3712

Abstract: MC100EL91 MC100LVEL91 SK100EL91WD SK100EL91WDT SK10EL91WD SK10EL91WDT un 1950
Contextual Info: SK10/100EL91W Triple PECL to ECL/LVECL and LVPECL to ECL/LVECL Translator PRELIMINARY HIGH-PERFORMANCE PRODUCTS Description Features The SK10/100EL91W is a triple PECL to ECL/LVECL and LVPECL to ECL/LVECL translator. It is fully compatible with MC100EL91 and MC100LVEL91. The

GD4520B

Abstract: Ta 7179 P
Contextual Info: Tliîn; G O LD S T A R 4028757 T E C H N O LO G Y GOLDSTAR TECHNOLOGY INC. IN C n 0 4 E 04E D I 4 0 2 0 7 5 7 □ □ □ 1 7 Ö G 01780 T - V S - 2 3 GD4520B DUAL 4-BIT BINARY COUNTER DESCRIPTION — The 4520B Is a Dual 4 -B it Internally Synchronous Binary Counter. Each counter

1A07

Abstract: ET-1 1A06 1A08 1A09 2A02 2A03 SN54FB1651 SN74FB1651
Contextual Info: SN54FB1651, SN74FB1651 17-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVERS WITH BUFFERED CLOCK LINES SCBS177B- OCTOBER 1993- REVISED JULY 1994 B-Port Biasing Network Preconditions the Connector and PC Trace to the Backplane Transceiver Logic High-Level Voltage TTL-lnput Structures Incorporate Active

Contextual Info: SbE D • 7^23? D Q M Q Q M b 2b4 ■ S 6 T H S C S -T H O M S O N IllJOTMO g§ M54HC237 M74HC237 S 6 S-THOMSON TL^ 7 ’ ' *2/” 5 ’5 ' 3 TO 8 LINE DECODER LATCH ■ LOW POWER DISSIPATION lCC = 4 /iA (MAX. at TA = 25°C ■ HIGH NOISE IMMUNITY V nih = V nil = 28% Vcc (Min.)