PHYSICAL DIMENSION Search Results

lem CTSR

Abstract: LBC5 cwi 1011
Contextual Info: DP83256,DP83257 DP83256 DP83257 PLAYER+ TM Device (FDDI Physical Layer Controller) Literature Number: SNOS673A October 1994 DP83256 56-AP 57 PLAYER a TM Device (FDDI Physical Layer Controller) The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical

UL 248-14 e19180

Abstract: buss gbb5 fuses buss 250v
Contextual Info: SMALL DIMENSION ELECTRONIC FUSES 1/4” x 1-1/4” Fast-Acting Fuses AGC Fast-Acting ABC Fast-Acting GBB Very Fast-Acting Physical Size: Physical Size: Physical Size: 1/4” x 1-1/4” (6.3mm x 32mm) Construction: Glass Tube, Nickelplated brass endcaps.

te-5005

Abstract: TXC oscillator Npi pulse transformer ic 7217 DP83924BVCE tp link schematic TL 722 DP83924A
Contextual Info: DP83924B DP83924B Quad 10 Mb/s Ethernet Physical Layer - 4TPHY Literature Number: SNLS033A DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY • Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer

TXC oscillator

Abstract: DP83924BVCE mac 97 ab DP8392 DP83924AVCE DP83924B RXI450 rxc 50 NATIONAL DP83924A
Contextual Info: January 1998 DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY General Description Features The Quad 10Mbps Ethernet Physical Layer 4TPHY is a 4-Port Twisted Pair PHYsical Layer Transceiver that includes all the circuitry required to interface four Ethernet

BS-28 POWER TRANSFORMER

Abstract: 10H11 AUTO100 ethernet transformer centre tap
Contextual Info: DP83840A DP83840A 10/100 Mb/s Ethernet Physical Layer Literature Number: SNLS006A DP83840A 10/100 Mb/s Ethernet Physical Layer Features General Description The DP83840A is a Physical Layer device for Ethernet 10BASE-T and 100BASE-X using category 5 Unshielded,

t7351

Abstract: DD231 T7352 T7351B-FC
Contextual Info: Data Sheet January 1994 microelectronics group Lucent Technologies Bell Labs innovations T7351B/T7352 FDDI/TPDDI Physical Layer Devices Features Description • Single-chip FDDI physical layer PHY solution The T7351B FDDI/T7352 TPDDI Physical Layer Devices are single VLSI components that implement

bel ms

Abstract: ST D63 DP83924A
Contextual Info: t ß DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer - 4TPHY General Description Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer 4TPHY is a 4-Port Twisted Pair PHYsical Layer Trans­

Contextual Info: Philips Semiconductors Preliminary specification 3-port physical layer interface 1.0 PDI1394P11A 2.0 FEATURES DESCRIPTION The Philips Sem iconductors PDI1394P11A is an IEEE1394-1995 com pliant Physical Layer interface. The PDI1394P11A provides the analog physical layer functions needed to implement a three port

NE255

Abstract: 4-bit even parity checker circuit diagram 74 TTL PACKAGE OUTLINES cwi 1011 CTSR error monitor comparator multiplexer parity fiber optic FM Modulator p832 pin diagram of ic 741 state of the art
Contextual Info: October 1994 DP83256 56-AP 57 PLAYER a TM Device FDDI Physical Layer Controller Y General Description The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical Layer (PHY) entity as defined by the Fiber Distributed Data

Contextual Info: 7 iqot Preliminary Data Sheet May 1993 m A TaT Microelectronics T7351B FDDI Physical Layer Device Features Description • Single-chip FDDI physical layer PHY solution The T7351B FDDI Physical Layer Device is a single VLSI component that implements the complete fiber

T55 transformer

Abstract: AMD 7990 mau aui ML2653 AM7990 DP8390 ML2652 ML2652CQ MPC850 transistor h44
Contextual Info: July 2000 ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU, Manchester Encoder/Decoder, and Twisted Pair Interface

Contextual Info: DP83865 DP83865 Gig PHYTER V 10/100/1000 Ethernet Physical Layer Literature Number: SNLS165B DP83865 Gig PHYTER V 10/100/1000 Ethernet Physical Layer General Description The DP83865 is a fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T,

PE-67583

Abstract: SF1153 77V106 77V1254 IDT77V106 TLA-6M103
Contextual Info: 3.3V ATM PHY for 25.6 and 51.2 Mbps Features * Performs the PHY-Transmission Convergence TC and Physical Media Dependent (PMD) Sublayer functions of the Physical Layer * Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5 specifications for 25.6 Mbps physical interface

T55 transformer

Abstract: LTP Cable 10BASE-TMAU
Contextual Info: December 1998 ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU, Manchester Encoder/Decoder, and Twisted Pair Interface

DP83924AVCE

Abstract: DP83924B DP83924BVCE Npi pulse transformer
Contextual Info: July, 1998 Semiconductor 1 * DP83924BVCE Quad 10 Mb/s Ethernet Physical Layer 4TPHY General Description Programmable MAC Interface supports most standard 7 signal MAC interfaces The DP83924B Quad 10Mbps Ethernet Physical Layer 4TPHY is a 4-Port Twisted Pair PHYsical Layer Trans­

lem CTSR

Abstract: cwi 1011 1170S p832 TWISTER T fiber T27 TIMER RR22H-RR23H
Contextual Info: PRELIMINARY October 1994 DP83256/56-AP/57 PLAYER + Device FDDI Physical Layer Controller General Description The DP8 32 56/56-AP/ 5 7 Enhanced Physical Layer Control­ ler (PLAYER + device) implements one complete Physical Layer (PHY) entity as defined by the Fiber Distributed Data

Contextual Info: SMART SM5640130UUNWGU Modular Technologies December 22, 1998 Revision History • December 22, 1998 Corrected physical dimension for 5V module page 12 Changed physical dimensions from inches to mm (pages 12 & 13). • January 6, 1997 Datasheet released.

Contextual Info: SMART SM5640440UUNWGU Modular Technologies December 22, 1998 Revision History • December 22, 1998 Corrected physical dimension for 5V module page 12 Changed physical dimensions from inches to mm (pages 12 & 13). • September 3, 1997 Datasheet released.

Contextual Info: SMART SM5640230UUNWGU Modular Technologies December 22, 1998 Revision History • December 22, 1998 Corrected physical dimension for 5V module page 12 Changed physical dimensions from inches to mm (pages 12 & 13). • March 21, 1997 Datasheet released.

Contextual Info: April 1997 Micro Linear ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The ML2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU, Manchester Encoder/Decoder, and Twisted Pair Interface

Contextual Info: SMART SM5640280UUNWGU Modular Technologies December 22, 1998 Revision History • December 22, 1998 Corrected physical dimension for 5V module page 12 Changed physical dimensions from inches to mm (pages 12 & 13). • June 16, 1997 Datasheet released.

Contextual Info: SMART SM5640880UUNWGU Modular Technologies December 21, 1998 Revision History • December 21, 1998 Corrected physical dimension for 5V module page 12 Changed physical dimensions from inches to mm (pages 12 & 13). • June 9, 1998 Datasheet released.

cwi 1011

Contextual Info: October 1994 DP83256 56-AP 57 PLAYER a TM Device FDDI Physical Layer Controller The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical Layer (PHY) entity as defined by the Fiber Distributed Data Interface (FDDI) ANSI X3T9 5 standard

GEC Plessey Semiconductors

Abstract: GEC Plessey NWK936 NWK918 DS4544
Contextual Info: COMMERCIAL-IN-CONFIDENCE NWK936 MAY 1996 ADVANCE INFORMATION DS4544 -1.0 NWK936 10/100BASE-TX ETHERNET PHYSICAL CODING SUBLAYER The NWK936 implements the Physical Coding Sublayer of the 10 and 100Mb/s Ethernet Physical Layer. It interfaces directly to the GPS NWK918 Transceiver and clock and data