PIN 74LS191 Search Results

74LS138

Abstract: 7443 ttl 74155 ttl 74191 7443 TTL 74ls138 74LS139 74LS191 74ls138 fairchild TTL 74145
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

74LS190 PIN diagram

Abstract: presettable digital clock ttl 74191 Fairchild 74190 74LS191 74155 D130 74192 74ls192 pin diagram of 74163
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

74191 8 bit

Abstract: D flip-flop 74175 pin 74LS152 74155 D134 D132 74155 PIN DIAGRAM 7442 logic diagram D133 93L21
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

pin diagram of 74LS191

Abstract: TTL 7452 74155 74190 74151 74151 PIN DIAGRAM D132 74LS151 Logic DIAGRAM 74ls156 74191 state diagram
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 T12 T11 T10 T9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

74191 8 bit

Abstract: 7443 Flip-Flop D134 7443 d Flip-Flop 74LS42 74155 9B23 D135 93L38 93L11
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

74LS190 PIN diagram

Abstract: ttl 7442 74LS42 74LS138 pin diagram D134 7442 pin diagram 74155 74145 D133 93L01
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

D133

Abstract: 74ls139 TTL 9334 74LS152 PIN 74LS42 7442 pin diagram 93L01 74156 ttl 74155 D132
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 T12 T11 T10 T9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

pin diagram decoder 74154

Abstract: 74155 decoder 74LS247 TTL 7448 74LS42 cmos decoder 7448 input 16 pin 7SEG COM ANODE 74151 PIN DIAGRAM cI 74150 D133
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

transistor d133

Abstract: Decoder BCD 7 seg ttl 7442 transistor 6B 7-seg ANODE COMMON 74155 74LS247 pin diagram of 74LS247 ttl 74191 75491
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

7448 decoder

Abstract: ID 9302 Fairchild 74190 pin diagram decoder 7447 TTL 7448 74LS47 74LS47 pin TTL 7446 decoder 74LS47 decoder 7448
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 G N D = Pin 8 Vcc = Pin 16 G N D = Pin 8

74LS255

Abstract: 74LS367 54LS 74LS258 ls386 74ls193 54LS/74LS191 inverter tristate
Contextual Info: Digital Circuits 9LS/54LS/74LS Low Power Schottky Cont. Description Type Number Available Packages Prop D elay1 (ns) or Max. Op. Freq. Pwr Diss. (M H z)2 (mW) w J 24 Pin 16 Pin 14 Pin J w 9LS/54 LS/74LS190 BCD decade counter, mode control 25 MHz 90 X X 9LS/54LS/74LS191

74LS190 pins

Abstract: 74LS192 PIN diagram 74LS183 TTL 74ls163 74LS192 pins Synchronous 74163 74LS161 74160 74LS162 74LS191 pins
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 N C = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 N C = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

74ls191 function table

Contextual Info: GD54/74LS191 SYNCHRONOUS 4-BIT UP/DOWN COUNTERS _ WITH MODE CONTROL Features Pin Configuration • • • • • • • • • Single down/up count control line Count enable control input Ripple clock output for cascading Asynchronously presettable with load control

Contextual Info: MITSUBISHI LSTTLs M 74LS191P SYNCHRONOUS PRESETTABLE UP/DOW N 4 -B IT BINARY COUNTER W ITH MODE CONTROL DESCRIPTION PIN CONFIGURATION TOP VIEW The M74LS191P is a semiconductor integrated circuit containing a synchronous 4-bit binary (hexadecimal) counter function with up/down control and preset inputs.

M74LS191P

Abstract: 20-PIN
Contextual Info: MITSUBISHI LSTTLs M74LS191P SYNCHRONOUS PRESETTABLE UP/DOW N 4 -B IT BINARY COUNTER W ITH MODE CONTROL DESCRIPTION PIN CONFIGURATION TOP VIEW The M74LS191P is a semiconductor integrated circuit containing a synchronous 4-bit binary (hexadecimal) counter function with up/down control and preset inputs.

transistor C3866

Abstract: Zener PH SEC E13009 ups circuit schematic diagram 1000w E13007 2 E13007 C3866 power transistor texas ttl 74L505 Transistor C3246
Contextual Info: BID CΚΤ DOLLY L IST L OGO LIST SA F E TY & RELIA ΒL TY ΤΕΚ PIN SYSTE M DIGITA L IC's MEMORIES, MOS CMOS .EC L , TT L MICR OP R OC E SSOR SPE CIA L FUN CTION IC's DIGITAL l LINE AR K ARR AYS LIN E A R IC's (PUR CH ) ΤΕΚ-MADE IC's IC's INDEX (COL ORE D PGS)

Truth Table 74191

Abstract: 74191 The truth table pin diagram of 74LS191 74191 truth table 74191 logic diagram 74191 state diagram 74191 74LS191 pins 74LS191PC 74LS191FC
Contextual Info: 191 C O N N E C T IO N D IA G R A M PIN O U T A 54/74191 6 ^4L S /74LS 191 p i|T / UP/DOW N BINARY COUNTER W ith Preset and Ripple Clock D E S C R IP T IO N — T he '191 is a reve rsib le m o d u lo -1 6 b in a ry c o u n te r fe a ­ tu rin g s y n c h ro n o u s c o u n tin g and a s ych ro n o u s p re se ttin g . T h e p reset fe a ture

74LS190 PIN diagram

Abstract: 74LS190 up down decade counter truth table of 74LS190 74LS191 datasheet 74LS190 pins 74LS190 74LS190 APPLICATIONS 74LS191 LS191 74LS190 application
Contextual Info: SN54/74LS190 SN54/74LS191 PRESETTABLE BCD/DECADE UP/DOWN COUNTERS PRESETTABLE 4-BIT BINARY UP/DOWN COUNTERS The SN54 / 74LS190 is a synchronous UP/ DOWN BCD Decade 8421 Counter and the SN54/ 74LS191 is a synchronous UP / DOWN Modulo-16 Binary Counter. State changes of the counters are synchronous with the

74LS190 APPLICATIONS

Abstract: 74LS191 truth table of 74LS190 74LS190 PIN diagram 74LS190 Pin 74ls191 pin diagram of 74LS191 3 decade counter
Contextual Info: <8> MOTOROLA, SN54/74LS190 SN54/74LS191 PRESETTABLE BCD/DECADE UP/DOWN COUNTERS PRESETTABLE 4-BIT BINARY UP/DOWN COUNTERS PRESETTABLE BCD/DECADE UP/DOWN COUNTERS The SN 54/74LS 190 is a synchronous UP/DOW N BCD Decade 8421 Counter and the SN54/74LS191 is a synchronous U P /D O W N Modulo-16

Truth Table 74191

Contextual Info: 191 CONNECTION DIAGRAM PINOUT A 54/74191 6 54LS/74LS191 l UP/DOWN BINARY COUNTER With Preset and Ripple Clock DESCRIPTION— The '191 is a reversible modulo-16 binary counter fea­ turing synchronous counting and asychronous presetting. The preset feature

Truth Table 74191

Abstract: 74191 truth table 74191 The truth table 74191 state diagram 74LS191 up down counter truth table
Contextual Info: NATIONAL SENICOND -CLO GIO 02E D I bSD112B □D b B 'in 7 I 191 CONNECTION DIAGRAM j PINOUT A 54/74191 54LS/74LS191 P i[T q UP/DOWN BINARY COUNTER T ^ cp c e [T 751 rc ö/d |T 12] T C 02 [? Ï Ï J 'P L 03 U Î^ P 2 g n d HIGH SPEED — 30 MHz TYPICAL COUNT FREQUENCY

74LS190 application

Abstract: 74LS191 74LS190 up down decade counter 74LS191 datasheet 74LS190 pin diagram of 74LS191 LS191 74LS190 PIN diagram 74LS190 APPLICATIONS 74LS190 pins
Contextual Info: SN54/74LS190 SN54/74LS191 PRESETTABLE BCD/DECADE UP/DOWN COUNTERS PRESETTABLE 4-BIT BINARY UP/DOWN COUNTERS The SN54 / 74LS190 is a synchronous UP/ DOWN BCD Decade 8421 Counter and the SN54/ 74LS191 is a synchronous UP / DOWN Modulo-16 Binary Counter. State changes of the counters are synchronous with the

multiplexers 74 LS 150

Abstract: 74LS255 74LS190 up down decade counter 74LS190 pins bcd counter 74 90 74LS192 pins 74LS191 74LS221 LS386 ls95b
Contextual Info: Digital Circuits 9LS/54LS/74LS Low Power Schottky Cont. Description Type Number Prop Delay1 (ns) or Max. Op. Freq. (MHz)2 Available Packages Pwr Oiss. (mW) 9LS/54LS/74LS190 9LS/54LS/74LS191 9LS/54LS/74LS192 9LS/54LS/74LS193 9 LS/54 LS/74 LSI 94 A BCD decade counter, mode control

IC 74LS190

Abstract: pin diagram of ic 74ls191 74L19 74LS190 up down decade counter pin diagram of 74LS191 74LS190 74LS191 74LS190 PIN diagram
Contextual Info: <8 > M OTOROLA SN54/74LS190 SN54/74LS191 D ESCRIPTIO N — The SN 54LS/74LS190 is a synchronous UP/DOWN BCD Decade 8421} Counter and the SN54LS/74LS191 is a syn­ chronous UP/DOWN Modulo-16 Binary Counter. State changes of the counters are synchronous with the LOW-to-HIGH transition of the