PLL 4049 Search Results

PLL 4049

Contextual Info: M ITEL SL1461SA Wideband PLL FM Demodulator SEMICONDUCTOR A dvance Inform ation D S 4049 - 1.2 The SL1461SA is a w ideband PLL FM demodulator, intended primarily for application in satellite tuners. The device contains all elements necessary, with the exception of external oscillator sustaining network and loop

Contextual Info: GEC PLESSEY S i S E M I C O N D U C T O R ! » D.S. 40491.3 S L 1 4 6 1 S A WIDEBAND PLL FM DEMODULATOR The SL1461SA is a wideband PLL FM demodulator, intended primarily for application in satellite tuners. The device contains all elements necessary, with the

MD 7144

Contextual Info: Preliminary W42B974 ill# ICW0RKS 3.3/5.0V PLL Clock Driver Features Functional Selections Pin for pin com patible with M otorola MPC974 Parameter 15 LVCM OS/LVTTL clock outputs Reference/Status VCO Selection Internal PLL circuit allows input frequency m ultiplication

Contextual Info: ì | N ic works ,li# Advance Information W42B930/931 3.3V PLL-Based System Clock Driver Function Table Features • Pin for pin com patible with Motorola MPC930/931 Reference/Status • Six LVCM OS/LVTTL clock outputs Parameter • Internal PLL circuit allows input frequency m ultiplication

LDCC28

Abstract: 1620Q thomson csf capacitor TSPC603E thomson csf capacitors
Contextual Info: T H O M S O N -C S F SEMICONDUCTEURS SPECIFIQUES TS88915T LOW SKEW CMOS PLL CLOCK DRIVER _ 3-State 70 and 100 MHz Versions DESCRIPTION The TS88915T Clock Driver utilizes a phazed-locked loop PLL technology to lock its low skew outputs' frequency and

Contextual Info: Coaxial Voltage Controlled Oscillator 5V Tuning for PLL IC's ZX95-4240+ 4120 to 4240 MHz Features • linear tuning characteristics • low phase noise • low pulling & pushing • protected by US patent 6,790,049 CASE STYLE: GB956 Applications •r&d • lab

ZX95-4240

Abstract: 40431 ZX95-4240-S
Contextual Info: Coaxial Voltage Controlled Oscillator 5V Tuning for PLL IC's ZX95-4240+ 4120 to 4240 MHz Features • Linear tuning characteristics • Low phase noise • Low pulling • Low pushing • Protected by US patent 6,790,049 CASE STYLE: GB956 Applications • R&D

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low S kew CMOS PLL Clock Drivers, 3 -S ta te 55, 70, 100, 133 and 160MHz Versions The MC88915T Clock Driver utilizes phase-locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference

sync master 951s circuit diagram

Abstract: motherboard columbia block diagram utah g 12 r
Contextual Info: m p Advance Information ic w o rk s W42B950/951 3.3V PLL-Based System Clock Driver Functional Selections Features • Pin for pin compatible with Motorola MPC95Q^951 Reference/Status • Nine LVCMOS/LVTTL dock outputs W42B950 Parameter • Internal PLLcircuit allow'slnputfrequency multiplication

nsk Crystal osc

Abstract: NSK oscillator 1N1426 WB1333 airtronic capacitor bitek VDO ecu Tekelec airtronic
Contextual Info: 1CWORKS WB1333-1 Dual Serial Input PLL With 510 MHz Prescalers INFORMATION SEPTEMBER U9S THIS INFORMATION IS SUBJECT TO CHANGE UPON COMPLETION OF PRODUCT CHARACTERIZATION IC WORKS 3725 N. 1st STREET SAN JOSE, CA 95134 PH. 408-922-0202 FAX 408-922-0833 PIN ASSIGNMENT

PL-012

Abstract: ROS-4240-119 c 6093
Contextual Info: Surface Mount Voltage Controlled Oscillator 5V Tuning for PLL IC's ROS-4240-119+ 4120 to 4240 MHz Features • Linear tuning characteristics • Low phase noise • Low pulling • Low pushing • Aqueous washable CASE STYLE: CK605 PRICE: $ 19.95 ea. QTY 5-49

mcl 427

Abstract: 42750
Contextual Info: Surface Mount Voltage Controlled Oscillator 5V Tuning for PLL IC's ROS-4240-119+ 4120 to 4240 MHz Features • linear tuning characteristics • low phase noise • low pulling • low pushing • aqueous washable CASE STYLE: CK605 PRICE: $ 19.95 ea. QTY 5-49

Contextual Info: Preliminary ill# ICW 0RKS WB1332X Dual Serial Input PLL with 1.2GHz and 510MHz Prescalers Features Figure 1 • IC WORKS BiCMOS process Pin Diagram • Operating voltage 2.7V to 5.5V — LI Vcc2 • Operating frequency to 1,2GHz and 510MHz with inputs of - 1 5dBm and Vcc of 3.0V

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low S kew CMOS PLL Clock Driver W ith Processor Reset The MC88916 Clock Driver utilizes phase-locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor

Contextual Info: Preliminary WB1305X ill# ICW 0RKS Dual Serial Input PLL with 550MHz Prescalers Features Figure 1 IC W O R KS BiCMOS process Pin Diagram Operating voltage 2.7V to 5.5V v cc1 Operating frequency to 550MHz with inputs of -1 5 d B m and VCC of 3.0V v cc2 V P1

C8891

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low S kew CMOS PLL C lock Driver W ith Processor R eset The MC88916 Clock Driver utilizes phase-locked loop technology to lock its low skew outputs' frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor

Contextual Info: Preliminary WB1333X ill# ICW 0RKS Dual Serial Input PLL with 510MHz Prescalers Features Figure 1 IC W O R KS BiCMOS process Pin Diagram Operating voltage 2.7V to 5.5V v cc2 Operating frequency to 510MHz with inputs of -1 5 d B m and V cc of 3.0V Lock detect feature

WB1332

Abstract: titan b3 NSK oscillator KMC-184 1N1086 W1332I VBW10 Electro Source Tekelec airtronic nsk Crystal osc
Contextual Info: 1CWORKS WB1332-I Dual Serial Input PLL With 12 GHz and 510 MHz Prescalers INFORM ATION JUNE 1995 TH IS INFORMATION IS SUBJECT T O CHANCE UPON COMPLETION O F PRODUCT CHARACTERIZATION IC WORKS 3725 N. 1st STREET SAN JOSE, CA 95134 PH. 408-922-0202 FAX 408-922-0833

Contextual Info: Preliminary WB1337X ill# ICW 0RKS Dual Serial Input PLL with 550MHz Prescalers Features Figure 1 IC W O R KS BiCMOS process Pin Diagram Operating voltage 2.7V to 5.5V v cc2 v cc1 Operating frequency to 550M H zw ith inputs of -2 5 d B m and VCC of 3.0V V P2

Contextual Info: Preliminary WB1310X ill# ICW 0RKS Dual Serial Input PLL with 1.2GHz Prescalers Features Figure 1 IC W O R KS BiCMOS process Pin Diagram Operating voltage 2.7V to 5.5V v cc1 Operating frequency to 1,2GHz with inputs of -1 5 d B m and V cc of 3.0V V P2 D0 PLL2

Contextual Info: Preliminary WB1331X ill# ICW 0RKS Dual Serial Input PLL with 2.0GHz and 510MHz Prescalers Features Figure 1 IC W O R KS BiCMOS process Pin Diagram Operating voltage 2.7V to 5.5V v cc2 Operating frequency to 2.0G Hz and 510MHz with inputs of -1 5 d B m and V c c of 3.0V

Contextual Info: MO TO R O L A SC LOGIC b3E D • b 3 b ? 2 S S □DTB'lOb A 4 2 « M O T M MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low S kew CMOS PLL C lock D river W ith Processor R eset Features • Provides Performance Required to Drive 68030 Microprocessor Family as well as the 33 and 40MHz 68040 Microprocessors

OHD 3- 80M

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low S kew CMOS PLL C lock Drivers, 3 -S ta te 55, 70, 100, 133 and 160M Hz Versions The M C 88915T C lock D river utilizes p h a se -lo cke d loop technology to lock its low skew o utputs’ fre q u en cy and phase onto an input reference

Contextual Info: TS88915T Low Skew CMOS PLL Clock Driver Tri-State 70 and 100 MHz Versions Datasheet Features • • • • • • • • • • • Vcc = 5V ± 5% Military Temperature Range Fully Compatible with the TS68040 Five Low Skew Outputs – Five Outputs Q0-Q4 with Output-to-Output Skew < 500 ps Each Being Phase End Frequency Locked to the SYNC Input