Untitled
Abstract: No abstract text available
Text: ZL30159 General Purpose Clock Rate Converter Short Form Data Sheet March 2013 Features • Precision synthesizer generates any clock-rate from 1 Hz to 177.5 MHz with jitter below 1ps • Programmable digital PLL synchronize to any clock rate from 1 Hz 1 pps to 750 MHz
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ZL30159
ZL30159GGG2
-40oC
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Adaptive OCXO Drift Correction Algorithm
Abstract: AD9548 pps digital pll synchronize gps 1pps holdover AN-1002 ocxo PLL matlab sensor 10mhz OCXO kalman filter C digital phase detector
Text: AN-1002 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com The AD9548 as a GPS Disciplined Stratum 2 Clock by Ken Gentile INTRODUCTION The synchronous optical network SONET is the backbone
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AN-1002
AD9548
GR-1244CORE,
AN08018-0-6/09
Adaptive OCXO Drift Correction Algorithm
pps digital pll synchronize
gps 1pps holdover
AN-1002
ocxo PLL
matlab sensor
10mhz OCXO
kalman filter C
digital phase detector
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AD5562
Abstract: No abstract text available
Text: Clock and Timing ICs for Wireline Applications In Networks and Beyond Analog Devices, Inc. ADI , is a global leader in high performance semiconductors for signal processing applications and a leader in integrated circuits for the telecommunications market. ADI offers a wide portfolio to address the
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TB06072-0-9/11
AD5562
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AN 6682
Abstract: IRIG-B PXI-6682H PXI-1031 PXI-6682 IRIG 781059-01 netgear DS104 PXI-1042
Text: GPS, IEEE 1588, and IRIG-B Timing and Synchronization Modules for PXI and PXI Express NI PXI-6682, NI PXI-6682H ◾◾ Synchronize PXI and PXI Express systems using GPS, IEEE 1588-2008, IRIG-B, or PPS ◾◾ Available for PXI systems, PXI-6682, and for PXI Express systems, PXI-6682H
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PXI-6682,
PXI-6682H
PXI-6682H)
AN 6682
IRIG-B
PXI-6682H
PXI-1031
PXI-6682
IRIG
781059-01
netgear
DS104
PXI-1042
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Untitled
Abstract: No abstract text available
Text: Short Form Data Sheet April 2012 DS31415 3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock General Description The DS31415 is a flexible, high-performance timing IC for diverse frequency conversion and frequency synthesis applications. On each of its three input clocks
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DS31415
750MHz.
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single phase to three phase conversion ic
Abstract: IEEE1588 19.44MHz TCXO DS31415
Text: ABRIDGED DATA SHEET 19-5712; Rev 2; 7/11 DS31415 3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock General Description The DS31415 is a flexible, high-performance timing IC for diverse frequency conversion and frequency synthesis applications. On each of its three input clocks
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DS31415
DS31415
750MHz.
24MHz,
48MHz,
10MHz,
20MHz,
44MHz,
88MHz
com/DS31415
single phase to three phase conversion ic
IEEE1588
19.44MHz TCXO
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Untitled
Abstract: No abstract text available
Text: Port Synchronizer for IEEE 1588 and Synchronous Ethernet 82P33724 SHORT FORM DATA SHEET HIGHLIGHTS • • • • • • DPLL1 and DPLL2 can be used on line cards to manage the generation of synchronous port clocks and IEEE 1588 synchronization signals based on multiple system backplane references
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82P33724
1000BASE-T
1000BASE-X
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Abstract: No abstract text available
Text: Synchronization Management Unit for IEEE 1588 and Synchronous Ethernet 82P33814 SHORT FORM DATA SHEET HIGHLIGHTS • • • • • • • • • • • • • Synchronization Management Unit SMU provides tools to manage physical layer and packet based synchronous clocks for IEEE 1588 /
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82P33814
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DS61125
Abstract: DS61107 DS61108 block diagram 8x8 booth multiplier DS61104 pic32mx220f032d RPB-6 DS61121 PIC18 sleep command PIC32MX220F032C
Text: PIC32MX1XX/2XX 32-bit Microcontrollers up to 128 KB Flash and 32 KB SRAM with Audio and Graphics Interfaces, USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture • 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz • 2.3V to 3.6V, -40ºC to +85ºC, DC to 50 MHz
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PIC32MX1XX/2XX
32-bit
16-bit
Hz/83
MIPS32®
MIPS16e®
32x16
32x32
Management-3-5770-955
DS61125
DS61107
DS61108
block diagram 8x8 booth multiplier
DS61104
pic32mx220f032d
RPB-6
DS61121
PIC18 sleep command
PIC32MX220F032C
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DS60001112
Abstract: DS60001124 DS60001121 DS60001120 DS60001122 DS60001114 DS60001129 DS60001127 DS60001104 DS60001117
Text: PIC32MX1XX/2XX 32-bit Microcontrollers up to 256 KB Flash and 64 KB SRAM with Audio and Graphics Interfaces, USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture • 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz • 2.3V to 3.6V, -40ºC to +85ºC, DC to 50 MHz
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PIC32MX1XX/2XX
32-bit
16-bit
Hz/83
MIPS32Â
MIPS16eÂ
32x16
DS60001112
DS60001124
DS60001121
DS60001120
DS60001122
DS60001114
DS60001129
DS60001127
DS60001104
DS60001117
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DS60001192
Abstract: mac 3021 vt-s PIC32MZ
Text: PIC32MZ Embedded Connectivity EC Family 32-bit MCUs (up to 2 MB Live-Update Flash and 512 KB SRAM) with Audio and Graphics Interfaces, HS USB, Ethernet, and Advanced Analog Operating Conditions Advanced Analog Features • 2.2V to 3.6V, -40ºC to +85ºC, DC to 200 MHz
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PIC32MZ
32-bit
12-bit
DS60001192
mac 3021 vt-s
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Untitled
Abstract: No abstract text available
Text: Port Synchronizer for IEEE 1588 and 10G/ 40G Synchronous Ethernet 82P33741 SHORT FORM DATA SHEET HIGHLIGHTS • • • • • • • DPLL1 and DPLL2 can be used on line cards to manage the generation of synchronous port clocks and IEEE 1588 synchronization signals based on multiple system backplane references
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82P33741
1000BASE-T
1000BASE-X
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DS60001194
Abstract: PIC32MZ2048ECG124 DS60001128 DS60001232
Text: PIC32MZ Embedded Connectivity EC Family 32-bit MCUs (up to 2 MB Live-Update Flash and 512 KB SRAM) with Audio and Graphics Interfaces, HS USB, Ethernet, and Advanced Analog Operating Conditions Advanced Analog Features • 2.2V to 3.6V, -40ºC to +85ºC, DC to 200 MHz
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PIC32MZ
32-bit
12-bit
DS60001194
PIC32MZ2048ECG124
DS60001128
DS60001232
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PIC32MX250F128B
Abstract: DS61112 DS61107 DS61106 DS61108 DS61125 22-pin picmicro information DS61117 pic32mx220f032b DS61121
Text: PIC32MX1XX/2XX 32-bit Microcontrollers up to 128 KB Flash and 32 KB SRAM with Audio and Graphics Interfaces, USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture • 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz ® Core: 40 MHz MIPS32 M4K
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PIC32MX1XX/2XX
32-bit
16-bit
MIPS32®
MIPS16e®
32x16
32x32
DS61168C-page
PIC32MX250F128B
DS61112
DS61107
DS61106
DS61108
DS61125
22-pin picmicro information
DS61117
pic32mx220f032b
DS61121
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Untitled
Abstract: No abstract text available
Text: PIC32MX1XX/2XX 32-bit Microcontrollers up to 128 KB Flash and 32 KB SRAM with Audio and Graphics Interfaces, USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture • 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz • Five General Purpose Timers:
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PIC32MX1XX/2XX
32-bit
16-bit
MIPS32Â
MIPS16eÂ
32x16
DS61168D-page
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Untitled
Abstract: No abstract text available
Text: PIC32MX1XX/2XX 32-bit Microcontrollers up to 128 KB Flash and 32 KB SRAM with Audio and Graphics Interfaces, USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture • 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz • Five General Purpose Timers:
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PIC32MX1XX/2XX
32-bit
16-bit
MIPS32Â
MIPS16eÂ
32x16
DS61168B-page
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pps digital pll synchronize
Abstract: DP83640 AN-2006 block diagram of receiver synchronization DP83640 software LMK03000 gps clock gps reciever
Text: National Semiconductor Application Note 2006 Patrick O'Farrell May 27, 2010 1.0 Introduction 2. The IEEE 1588 Precision Time Protocol PTP provides a means of synchronizing the time between multiple nodes using standard Ethernet connections. In many applications,
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AN-2006
pps digital pll synchronize
DP83640
AN-2006
block diagram of receiver synchronization
DP83640 software
LMK03000
gps clock
gps reciever
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DS60001120
Abstract: DS60001124 DS60001130 DS60001112 DS60001108 DS60001126
Text: PIC32MX330/350/370/430/450/470 32-bit Microcontrollers up to 512 KB Flash and 128 KB SRAM with Audio/Graphics/Touch (HMI), USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture • 2.3V to 3.6V, -40ºC to +105ºC, DC to 80 MHz
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PIC32MX330/350/370/430/450/470
32-bit
Hz/105
MIPS32
MIPS16eÂ
32x16
32x32
16-bit
DS60001185B-page
DS60001120
DS60001124
DS60001130
DS60001112
DS60001108
DS60001126
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LMK3000
Abstract: AN1729 pps digital pll synchronize 784C DP83640 Synchronous Ethernet DP838640
Text: National Semiconductor Application Note 1730 David Miller September 2007 1.0 Introduction ken and then re-established, a new fixed mean is established within the constraints of the sampling clock. For the purpose of this document, the term “Precision” is used
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DP83640,
AN-1730
LMK3000
AN1729
pps digital pll synchronize
784C
DP83640
Synchronous Ethernet
DP838640
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Untitled
Abstract: No abstract text available
Text: SYNCHRONOUS ETHERNET IDT WAN PLL IDT82V3390 DATASHEET Version - 1 Preliminary Datasheet April 15, 2011 DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product. The Company makes no representations that circuitry
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IDT82V3390
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DS60001112
Abstract: No abstract text available
Text: PIC32MX330/350/370/430/450/470 32-bit Microcontrollers up to 512 KB Flash and 128 KB SRAM with Audio/Graphics/Touch (HMI), USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture • 2.3V to 3.6V, -40ºC to +105ºC (DC to 80 MHz),
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PIC32MX330/350/370/430/450/470
32-bit
16-bit
Hz/131
MIPS32
MIPS16eÂ
32x16
a1-9859
DS60001185C-page
DS60001112
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Untitled
Abstract: No abstract text available
Text: Synchronization Management Unit for IEEE 1588 and Synchronous Ethernet 82P33810 SHORT FORM DATA SHEET HIGHLIGHTS • • • • • • • • • • • • • Synchronization Management Unit SMU provides tools to manage physical layer and packet based synchronous clocks for IEEE 1588 /
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82P33810
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Untitled
Abstract: No abstract text available
Text: Synchronization Management Unit for IEEE 1588 and 10G/40G Synchronous Ethernet 82P33831 SHORT FORM DATA SHEET HIGHLIGHTS • • • • • • • • • • • • • • Synchronization Management Unit SMU provides tools to manage physical layer and packet based synchronous clocks for IEEE 1588 /
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10G/40G
82P33831
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GR-1244-CORE
Abstract: No abstract text available
Text: SYNCHRONOUS EQUIPMENT CLOCK STRATUM 3E CLOCK UNIT – SY0004 Model SY0004 Date: March 21-00 PRELIMINARY • INTRODUCTION The SY-0004 is an accurate time and frequency source that has been designed as a module level subsystem. The module is designed to work within ATM, SONET, SDH, and wireless systems where synchronization is vital. The
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SY0004
SY-0004
GR-1244-CORE.
SY0004
GR-1244-CORE
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