Q0027 Search Results

AOI32

Contextual Info: SEEÚ TECHNOL OGY INC 11E I> • flina33 Q0027M4 0 E/M47F512 512K Bit CMOS FLASH EPROM October 1989 PRELIMINARY DATA SHEET Block Diagram Features ■ 64K Byte FLASH Erasable Non-Volatile Memory ■ Input Latches for Writing and Erasing ■ Fast Byte Write: 225ps max

IDT7M824

Contextual Info: INT EGR AT E» DEVICE T7 4 8 25 77 1 I N T E G R A T E D DEVI CE " Î ËJ 4055771 Q0027Ö1 4 J “ 97D 0 2 7 8 Ï 1 M EGABIT 128K x 8) R EG ISTE R ED /B U FFER ED / LATCHED C M O S STATIC RAM SUB SYSTEM S D/ T-46-23-14 IDT7M824 FAMILY FEATURES: DESCRIPTION:

KL SN 102 94v

Abstract: wire T568 SCV64 The VMEbus Handbook, Fourth Ed VMEbus interface handbook Q002 ih 584 el designer manual kds 1555 SAA 1260 Ka 2535
Contextual Info: O p e n b u s In t e r fa c e C o m p o n e n t s SCV64 User Manual Issue 1 * / • bSflfllDl Q[ D24A0 134 ■ This Material Copyrighted By Its Respective Manufacturer T h e in fo rm a tio n in th is d o c u m e n t is su b je c t to c h a n g e w ith o u t n o tic e an d sh o u ld n o t be c o n stru ed as a

Contextual Info: 12V Linear Flash EPROM Programming Regulator and 2.5V Precision Reference Description Features The CS-8109 has a 12V ±3% linear regu­ lator, a high precision 2.5V reference, and microprocessor compatible control circuitry. age, and short circuit conditions. If the

0.0.026.01 capacitor

Abstract: viterbi algorithm IESS-308 sCRAMBLER STEL2176
Contextual Info: Introduction KEY FEATURES RECEIVER • ■ ■ 10-b it A/D on chip 1 6 /6 4 /2 5 6 QAM demodulation Selectable ITU-T J.83 , Annex A/Annex B forward error correction (FEC) ■ MCNS, IEEE 8 0 2 .1 4 (preliminary), DAVIC/DVB compliant ■ Parallel or serial output data with or

Contextual Info: I l O MULTI-POWER SUPPLY M R S5V E 0X X X SERIES •OUTLINE The RS5VE0X X X series are multi-power supply ICs with high accuracy output voltage and detector thresh­ old and with ultra low supply current by CMOS process. Each of these ICs consists of four voltage regulators,two

Contextual Info: WAFER SCALE INTEGRATION bSE ]> TSBTbTQ 00Q2742 TSS •lilAFl Programmable Peripheral PSD5XX Family Field-Programmable Microcontroller Peripherals Preliminary Key Features □ Complete family of Field Programmable Microcontroller Peripherals enables the user to efficiently implement a highly

v110h

Abstract: V53C104F
Contextual Info: M O S E L VTTELÊ C V53C 104F H IG H PE R FO RM A N CE, L O W P O W E R 2 5 6 K X 4 B IT F A S T P A G E M O D E CM O S D Y N A M IC R A M 60/60L 70/70L 80/80L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns

Q002

Abstract: SPT7610
Contextual Info: SPT76 I O @ S P T 6-BIT, 1 GSPS FLASH A/D CONVERTER ADVANCED INFORMATION SiGNAL PROCESSING TECHNOLOGIES FEATURES APPLICATIONS • 1 : 2 Demuxed ECL Compatible Outputs • 1.0 GSPS Conversion Rate • Wide Input Bandwidth -1 .4 GHz • Low Input Capacitance - 8 pF

82C568

Abstract: 82C567 4464 64k dram 4464 dram HA20C md4203 AD7166 82C566 SiS chipset 486 opti 82c
Contextual Info: 82C566/82C567/82C568 Viper-MAX Chipset Scaleable MultiMedia PC Solution 1.0 Features CPU Interface • Fully supports all Intel 3.3V Pentium processors P54C™, P55C™, P55CT™ at 50, 60, and 66.667MHz • Supports AMD® K86™ and Cyrix® 6x86 processors

Contextual Info: A MN5930 ro networks 12-Bit, 30MHz Sampling A/D Converter FEATURES • 12-Bit Resolution • 30MHz Sampling Rate • 130MHz Small Signal Input Bandwidth • +/-2.0V Input Range • TTL-Compatible Digital Inputs/O utputs • Small 32-Pin Plastic DIP • 1.1 Watt Power

pt4116

Abstract: slxt915
Contextual Info: D ATA SHEET m m A pril Revision 2.0 LXT915 S im p le Q u a d E th e r n e t R e p e a te r 1 General Description • 1 Features The LXT915 is an integrated multi-port repeater designed for mixed-media networks. It provides all the active cir­ 1 • Four integrated 10BASE-T transceivers and one AUI

ECW20

Contextual Info: MICRON TECHNOLOGY INC b l l l S ^ 0005737 Ô BflE D 1 6 K S R A M X 1 IMRN S R A M l- FEATURES PIN ASSIGNMENT Top View • High speed: 12,15,20,25,30 and 35ns • High-performance, low-power, CMOS double metal process • Single +5V (±10%) power supply

Contextual Info: UES4505S UES4510S UES4515S RECTIFIERS High Efficiency, 45A, 50-150V FEATURES DESCRIPTION • Economical Convenient TO-3P Package The U ES4505S Series, in the econom ical, convenient TO-3P package, is specifically designed for operation in power switching circu its to frequencies in excess of 100kHz.

Contextual Info: •HYUNDAI HY51V4170B S e rie s 256K X 16-blt CMOS DRAM with 2 WE PRELIMINARY DESCRIPTION The HY51V4170B is the new generation and fast dynamic RAM organized 262,144 x 16-bit configuration employing advanced submicron CMOS process technology and advanced circuit design technique to achieve

HY514260B

Contextual Info: H Y 5 1 4 2 6 0 B "HYUNDAI S e r ie s 2S6KX 16-bit CMOS DRAM with 2CAS PRELIMINARY DESCRIPTION The HY514260B is the new generation and fast dynamic RAM organized 262,144 x 16-bit configuration employing advanced submicron CMOS process technology and advanced circuit design technique to achieve fast access

Contextual Info: MN5925 ro networks 12-Bit, 20MHz Sampling A/D Converter FEATURES DESCRIPTION • 12-Bit Resolution • 20MHz Sampling Rate • 120MHz Small Signal Input Bandwidth The MN5925 is a monolithic 12-bit, 20MHz sampling A/D converter with an on-board input buffer and T/H amplifier. This device is packaged

Contextual Info: A T & T MELEC I C 25E D • Q Q S D 0 2 b 0 0 0 2 7 2 1 fl ■ REGULATION CONTROL CIRCUIT LBR FAMILY Description The Regulation Control Circuit LBR Family consists of integrated circuits which provide three useful power supply function (see Applications) in the same package: a voltage regulator, 4 precision 1.25 V reference, and a high-speed

5962-9096504MTA

Contextual Info: Military Field Programmable Gate Arrays Features A C T 3 Features Highly Predictable Performance with 100 Percent Automatic Placement and Routing • Highest-Performance, Highest-Capacity FPGA Family Device Sizes from 1200 to 10,000 gates up to 25,000 PLD

Contextual Info: LATTICE SEMICONDUCTOR böE J> • DDD2730 TE5 * L A T Lattice G A L 1 6 V 8 High Performance E2CMOS PLD Generic Array Logic ■■■■■■ FUNCTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 5 ns Maximum Propagation Delay

Contextual Info: WAFER SCALE INT EGRATION bSE D • 00QSbS3 W Programmable Peripheral PSD4XX Family Field-Programmable Microcontroller Peripherals Preliminary Key Features □ Complete family of Field Programmable Microcontroller Peripherals enables the user to efficiently implement a highly

LXT914PE

Contextual Info: DATA SHEET JUNE 1997 Revision 2.2 LXT914 Flexible Quad Ethernet Repeater General Description Features The LXT914 is an integrated multi-port repeater designed for mixed-media networks. It provides all the active cir­ cuitry required for the repeater function in a single CMOS

OP1126

Abstract: OPI125 OPI126 OPI127 OPI128 BTS5F
Contextual Info: P rodu ct Bulletin OPI125 — t.7TflSflo 0 00 57 13 m ? -i.O P T E K J u ly 1996 Photologic Optically Coupled Isolators Types OPI125, OPI126, OPI127, OPI128 Features A b so lu te M axim u m R a t in g s Ta = 25° C unless otherwise noted • • •

IS455

Abstract: 1S445 IS445 light detecting resistor opic
Contextual Info: SHARP ELEK/ MELEC DIV 15E 0 I 31007^0 0005740 7 I " • O H C Light Detectors IS445/IS455 Linear Output Type OPIC Light Detector T-41-67 Features ì. 2. 3. IS 44 5/IS 4 55 O utline Demensions Liner output Two packages according to mounting method Side-view type IS445