Q0131 Search Results

Contextual Info: SAMSUNG ELE CTRONICS INC b4E J> • 7 ^ 4 1 4 2 Q013174 b03 ■ KM41C4000ASL CMOS DRAM 4 M X 1 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Perform ance range: The Samsung K M 4 1 C 4 0 0 0 A S L is a high speed CMOS 4 ,1 9 4 ,3 0 4 bit X 1 Dynam ic Random A ccess M em ory.

M5911

Abstract: fs211
Contextual Info: SILICONIX INC IflE D • 6254735 0013T14 & M5911 SERIES JUi in c o rp o ra te d N-Channel JFET Pairs The M5911 Series are monolithic pairs of JFETs mounted In a single TO-78 package. The M5911 features high speed amplification slew rate , high gain (typically > 6 mS), and low gate leakage

Contextual Info: rruimi LTC1318 TECHNOLOGY Single 5V RS232/RS422/AppleTalk DCE Transceiver F€RTUR€S DCSCRIPTIOn • Single Chip Provides DCE RS232 or RS422/AppleTalk DCE Port ■ Operates from a Single 5V Supply ■ Charge Pump Uses 0.1 jjF Capacitors ■ Output Common-Mode Voltage Range Exceeds

Contextual Info: IN T E G R A T E D C IR C U IT S UC1904 UC2904 UC3904 UNITRODE Precision Quad Supply and Line Monitor FEATURES DESCRIPTION • Inputs lor Monitoring Up to Four Supply Voltages • Two Inputs Preset for -5V and -12V Monitoring, or Programmable Positive Levels

1186C

Abstract: cxd1135q cxd1130q
Contextual Info: CXD1186CQ/CR SONY« C D - R O M Decoder Description CXD1186C is a CD-ROM decoder LSI. CXD1186CQ 80pln QFP Plastic Features CXD1186CR 80pin VQFP (Plastic) • Corresponds to CD-ROM, CD-I and CD-ROM XA formats. • Real time error Correction. (Erasure Correction

Contextual Info: IN T E G R A T E D C IR C U IT S UCC1570 UCC2570 UCC3570 UNITRODE Low Pow er Pulse Width Modulator P R E L IM IN A R Y FEATURES D E S C R IP T IO N • Low Power B iC M O S Process The U C C 1 570 family of pulse width modulator controllers Is intended for appli­

fault detection broadband network

Abstract: air variable capacitor tr-5-t
Contextual Info: Advance Data Sheet March 1994 s illA n B T % ü i= ' Microelectronics T7650 PHOENIX 8-bit Parallel Buffered 2-by-2 Switching Node for Broadband Switching Networks Description Features • 8-bit wide parallel data for high-speed throughput 320 Mbits/s per port with 40 MHz clock

LS156

Abstract: LS156B IS156 lt 5237 DUI313 M761 LS156A KIA 278
Contextual Info: S-THONSON 07 É Ö1C 19305 TELEPHONE SPEECH CIRCU IT WITH M U LTIFR EQ U EN CY TONE G EN ER ATO R IN TERFACE sending and receiving amplifiers to compen­ sate for line attenuation by sensing the line length through the line current. The LS156 is a monolithic integrated circuit in

msi motherboard circuit diagram

Abstract: MSI MOTHERBOARD schematic diagram MSI MOTHERBOARD SERVICE MANUAL amd MOTHERBOARD SERVICE MANUAL L64811 circuit diagram of msi motherboard MOTHERBOARD msi CIRCUIT diagram intel D102 motherboard sparkit-40 l64863
Contextual Info: • 5304A04 LSI LOGIC 0013137 531 El LLC 53D4AD4 001313A 47fl LLC LSI Logic has derived the material in this manual, which describes the L64863 Clock Chip, from documents provided by Sun Microsystems, Inc. The chip described in this manual is guaranteed to function as described only when

MT28F400B3WG-8 tcp 41c

Contextual Info: SAMSUNG ELECTRONICS INC b4E D • 7 ^ 4 1 4 2 0013140 220 »SnfiK KM 41C4000A CMOS DRAM 4 M X 1 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Perform ance range: The Samsung K M 41C 4000A is a high speed CMOS 4 ,1 9 4 ,3 0 4 bit X 1 Dynamic Random Access Memory.

bi 565

Abstract: 1313T tl-107A
Contextual Info: CMOS MT90737 DS3/DS1 MUX/DEMUX M13 Preliminary Information Features ISSUE 1 Multiplexes/demultiplexes 28 DS1 signals to/from a DS3 signal Ordering Information MT90737AM Selectable M13 or C-bit parity mode Separate interface for C-bits 208 Pin PQFP -40° to 85 °C

Contextual Info: CY7C372 PRELIMINARY WFJ CYPRESS 64-Macrocell Flash CPLD Features Functional Description • 64 macrocells in four logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • No hidden delays • Highspeed — fMAX = 125 MHz — tpD = 10 ns

l6703

Abstract: L6283 l6278 L6284 L6916 l6262 A1658 SVC 561 14 C3041 A1671
Contextual Info: RVCT 3.1 Build Tools - Errors and Warnings March 2008 Introduction This document lists the errors and warning messages that can be generated by the Build Tools of the ARM RealView Compilation Tools RVCT version 3.1, including patches. RVCT 3.1 is provided with RVDS

L6284

Abstract: A1273 L6283 a1046 L6278 L6559 l6262 a1583e A1154 a1273* transistor
Contextual Info: RVCT 2.0 Build Tools - Errors and Warnings Release 1.0 – 27th August 2003 Introduction This document illustrates the errors and warning messages that are generated by the Build Tools of ARM RealView Compilation Tools 2.0 and later. If you are using ADS ADS 1.2, 1.1 or 1.0.1 or RVCT 1.2

74HC

Abstract: 7C344 CY7C344 CY7C344B 20C02 DD131
Contextual Info: CY7C344 CY7C344B *0 CYPRESS 32-Macrocell MAX EPLD Features Functional Description • High-performance, high-density re­ placement for TTL, 74HC, and cus­ tom logic • 32 macrocells, 64 expander product terms in one LAB • 8 dedicated inputs, 16 I/O pins

DD131

Contextual Info: CY7C343 CY7C343B CYPRESS 64-Macrocell MAX EPLD Functional Description Features • 64 MAX macrocells in 4 LABs • 8 dedicated inputs, 24 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS E P R O M technology CY7C343

KDS 1M

Abstract: kds 9a 2SK1063 2SK1064 KDS 5M HITACHI 2SK* TO-3 Hitachi Scans-001 kds 8a
Contextual Info: 2SK1063.2SK1O64blE D • MMTbiEOS 0 0 1 3 1 7 3 S IL IC O N N -C H A N N E L M O S F E T T3T ih itm HITAC HI/ O PTOE LEC TRON ICS HIGH SPEED POWER SWITCHING 1. Gat« 2. 3. Source D rain (C ase) (Dimensions in nun) (JEDEC TO-3) ¡A B S O L U T E MAXIMUM R A TING S (T o -2 5 °C )

ABP1

Contextual Info: Advance Data Sheet March 1994 , sA TC T Microelectronics T7650 PHOENIX 8-bit Parallel Buffered 2-by-2 Switching Node for Broadband Switching Networks Features • Asynchronous transfer mode ATM cell compati­ ble ■ Crosspoint-buffered, self-routing, 2-by-2 switching

Contextual Info: ADVANCE I IfcCHNOlOUY. INC. DRAM 16 MEG x 4 3.3V, BURST EDO FEATURES PIN A SSIG N M EN T Top View • Burst order, interleave or linear, programmed by executing WCBR cycle after initialization • Single +3.3V ±5% power supply • Industry-standard x l6 pinout and package

l6703

Abstract: asm 1442 L6916E SVC 561 14 L6232E A1659 a1718 a1694 C2068 STR 6765
Contextual Info: RVCT 3.0 SP1 Build Tools - Errors and Warnings Last updated March 2008 Introduction This document illustrates the errors and warning messages that are generated by the Build Tools of ARM RealView Compilation Tools 3.0, 3.0 Service Pack 1, and subsequent 3.0 patches. If you are using ADS

L6283

Abstract: L6278 l6703 L6916 A1273 L6320W 0496B L6252 L6324 A1671
Contextual Info: ARM Compiler toolchain Version 4.1 Errors and Warnings Reference Printed on: October 25, 2010 Copyright 2010 ARM. All rights reserved. DUI 0496B ID102510 ARM Compiler toolchain Errors and Warnings Reference Copyright © 2010 ARM. All rights reserved.

l6703

Abstract: A1659 L6361 L6352 L6916 C3335 C3331 c3317 A1652W A1671
Contextual Info: RealView Compilation Tools Version 4.0 Errors and Warnings Reference Copyright 2010 ARM. All rights reserved. DUI 0495A ID041910 RealView Compilation Tools Errors and Warnings Reference Copyright © 2010 ARM. All rights reserved. Release Information

LS156

Abstract: circuit diagram for automatic voltage regulator G
Contextual Info: S - T H O N S O N 07É D I 7 C!ECI537 001 3 13 4 Ö1C 19 3 0 5 D T - 7f - 0 7 '/$- LSI 56 TELEPHONE SPEECH C IR C U IT W ITH M U LTIFR EQ U EN C Y TONE GENERATOR INTERFACE sending and receiving amplifiers to compen­ sate for line attenuation by sensing the line

Contextual Info: 24AA04/08 M I C R O C H 1P 4K/8K 1.8V CMOS Serial EEPROMs FEATURES PACKAGE TYPE • Single supply with operation down to 1.8V DIP A0 C • Low pow er CMOS technology - 1 mA active current typical D A1 C 24AA04/08 - 10 nA standby current typical at 5.5V - 3 |xA standby current typical at 1.8V