Q815 Search Results

f11u

Abstract: FC 0012 TSOP 50 PIN cs-7sa CS7SA k0219 EN5055
Contextual Info: Ordering number : EN5055 _ CMOS LSI No. 5055 LC382161T-17 IS ipîppi; 2 MEG 65536 words x 16 bits x 2 banks Synchronous DRAM J 8¡|lí¡Bí: 1 Overview Package Dimensions The LC382161 series products are 3.3 V single-voltage power supply synchronous DRAMs with a 65536-word x

00C2H

Contextual Info: MX27C4100/27C4096 4M-BIT [512K x 8/256K x 16] CMOS EPROM FEATURES • 256K x 16 organization MX27C4096, JEDEC pin • • • • • • • • out 512K x 8 or 256K x 16 organization(MX27C4100, ROM pin out compatible) +12.5V programming voltage Fast access time: 100/120/150 ns

Contextual Info: MX27C8100 8M-BIT [1M x8/512K x16] CMOS OTP ROM FEATURES • • • • • • Operating current: 60mA • Standby current: 100uA • Package type: 1M x 8 or 512K x 16 organization +12.5V programming voltage Fast access time: 100/120/150/200 ns Totally static operation

27l41

Contextual Info: IWKIC M X 2 7 U 1 0 0 / 27L4096 4 M -BIT 5 1 2 K x 8 / 2 5 6 K x 1 6 CM OS EPROM FEATURES • 256K x 16 organization(MX27L4096, JEDEC pin out) • 512K x 8 or 256K x 16 organization(MX27L4100, ROM pin out compatible) • Wide voltage range, 2.7V to 3.6V

Contextual Info: IW Â O T Â i û i P OiFÛPMÂTOÛi M X2 7 Cl 6 1 O K IC 1 6 M -BIT[2 M X 8/ 1 M x 1 6] CMOS OTP ROM FEATURES • • • • • 2M x 8 or 1M x 16 organization +12.5V programming voltage Fast access time: 100/120/150/200 ns Totally static operation Completely TTL compatible

MX27C8111

Contextual Info: Introduction Selection Guide PRELIMINARY MX27C8111 8M-BIT[1M x 8/512K x 16] CMOS OTP ROM WITH PAGE MODE FEATURES • • • • • • With Page Mode function, 8-word/16-byte page 1M x 8 or 512K x 16 organization +12.5V programming voltage Fast access time:90/100/120/150 ns

MX27C4111

Contextual Info: PRELIMINARY MX27C4111 4M-BIT [512K x8/256K x16] CMOS EPROM WITH PAGE MODE FEATURES • • • • • • • • • • With Page Mode function, 8-word/16-byte page 512K x 8 or 256K x 16 organization +12.5V programming voltage Fast access time: 90/100/120/150 ns

MX27C4111

Contextual Info: Introduction Selection Guide PRELIMINARY MX27C4111 4M-BIT 512K x 8/256K x 16 CMOS EPROM WITH PAGE MODE FEATURES • • • • • • With Page Mode function, 8-word/16-byte page 512K x 8 or 256K x 16 organization +12.5V programming voltage Fast access time: 90/100/120/150 ns

MX27C1610PC-10

Abstract: IN3064 MX27C1610 MX27C1610MC-15
Contextual Info: Introduction Selection Guide ADVANCED INFORMATION MX27C1610 16M-BIT[2M x 8/1M x 16] CMOS OTP ROM FEATURES • • • • • 2M x 8 or 1M x 16 organization +12.5V programming voltage Fast access time: 100/120/150/200 ns Totally static operation Completely TTL compatible

MX27C8100

Contextual Info: Introduction Selection Guide MX27C8100 8M-BIT[1M x 8/512K x 16] CMOS OTP ROM FEATURES • • • • • 1M x 8 or 512K x 16 organization +12.5V programming voltage Fast access time: 100/120/150/200 ns Totally static operation Completely TTL compatible • Operating current: 60mA

D1825

Abstract: d1833 AN-265 D1531
Contextual Info: APPLICATION NOTE AN-265 BUS MATCHING WITH IDT FIFOs BUS MATCHING The following diagrams show how an external byte-oriented bus should be mapped to the 9-bit oriented FIFO. The Bus Matching feature offered in the SuperSync II family is a powerful feature designed to eliminate external MUXes. When used in applications where

MX27C4100DC

Abstract: MX27C4096DC-10 mx27C4100DC-10 MX27C4100DC-12 mx27c4096dc EPROM sop 40 MX27C transistor organ MX27C4096 MX27C4100
Contextual Info: INDEX MX27C4100/27C4096 4M-BIT [512K x 8/256K x 16] CMOS EPROM FEATURES • Operating current: 60mA • Standby current: 100uA • Package type: • 256K x 16 organization MX27C4096, JEDEC pin out • 512K x 8 or 256K x 16 organization(MX27C4100, • •

AU-6433

Abstract: ISL6251 AU6433-B52-GBL-GR am4825p CN603 CN701 d8107 1000-F50E-02R fdmc4435bz s104 85a
Contextual Info: 5 4 3 2 1 D D ACER_BAP51/BAP52 C C MINI-CARD BOARD 2009.06.30 B B A A EE DRAWER DESIGN CHECK RESPONSIBLE SIZE= FILE NAME: XXXX-XXXXXX-XX P/N XXXXXXXXXXXX 5 4 3 2 DATE POWER DATE INVENTEC D-CS-1310A2271201-ALG TITLE BAP51/BAP52 MINI-CARD/B VER: CODE SIZE Custom A01

Contextual Info: MX27C2100/27C2048 2M-BIT [256Kx8/128x16] CMOS EPROM FEATURES • • • • • 128K x 16 organization MX27C2048, JEDEC pin out • 256K x 8 or 128K x 16 organization(MX27C2100, ROM pin out compatible) • +12.5V programming voltage • Fast access time: 55/70/90/120/150 ns

Contextual Info: MX27C1100/27C1024 1M-BIT [128K x 8/64K x 16] CMOS EPROM FEATURES • 64K x 16 organization MX27C1024, JEDEC pin • • • • • • Operating current: 40mA • Standby current: 100uA • Package type: out 128K x 8 or 64K x 16 organization(MX27C1100, ROM pin out compatible)

MX27C8100PC-17

Abstract: MX27C8100DC-20
Contextual Info: I L Ä f M Y M X 2 7C 8 1O O S M -a m iM X 8 / 5 - 1 2 K x I B C A M » 0>RO M FEATURES • • • • • 1 M x 8 o r 5 1 2 K x 1 6 organization +12.5V programming voltage Fast access time: 120/150/175/200 ns Totally static operation Completely TTL compatible

X27C4

Abstract: MX27C4096DC-12 MX27C4096DC 27c4100
Contextual Info: [P ^E L D M O liM ß W M X IC M X27C 4100/27C4096 4IN/I-BITI51SK x 8 /2 5 B K x 1 B CMOS EPROM FEATURES • 256K x 16 organization MX27C4096, JEDEC pin out) • 512K x 8 or 256K x 16 organization(MX27C4100, ROM pin out compatible) • +12.5V programming voltage

mx27C4100DC-10

Contextual Info: IW K IC rad M X 2 7C 4 1 0 0/27C4096-10 4 M - B I T { 5"1 2 K x 8 / 2 5 6 K x 1 6 J C M O S E P R O M FEATURES • 256K x 16 organization MX27C4096, JEDEC pin out • 512K x 8 or 256K x 16 organization(MX27C4100, ROM pin out compatible) • +12.5V programming voltage

marking q815

Contextual Info: H Y U N D A I - « H Y 512260 128Kx16. CMOS DRAM wlth/2CAS DESCRIPTION This family is a 2M bit dynamic RAM organized 131,072 x 16-bit configuration with CMOS DRAMs. The circuit and process design allow this device to achieve high performance and low power dissipation. Independent read and write of upper and

Contextual Info: IBM038329PQ6 IBM038329NQ6 256K x 32 Synchronous Graphics RAM Features • Fully synchronous; all signals registered on pos­ itive edge of system clock. • Internal pipelined operation; column address can be changed every clock cycle. • Dual internal banks for hiding row precharge;

MX27C2048

Contextual Info: Introduction ADVANCED INFORMATION MX27L2048 2M-BIT 256K x 8/128K x 16 CMOS EPROM FEATURES • • • • • 128K x 16 organization(MX27C2048, JEDEC pin out) +12.5V programming voltage Fast access time: 150/200/250 ns Totally static operation Completely TTL compatible

Contextual Info: Introduction Selection Guide ADVANCED INFORMATION MX27C1611 16M-BIT[2M x 8/1M x 16] CMOS OTP ROM WITH PAGE MODE FEATURES • • • • • • With Page Mode function, 8-word/16-byte page 2M x 8 or 1M x 16 organization +12.5V programming voltage Fast access time:100/120/150 ns

MX27C1100

Contextual Info: Introduction Selection Guide MX27C1100/27C1024 1M-BIT 128K x 8/64K x 16 CMOS EPROM FEATURES • 64K x 16 organization(MX27C1024, JEDEC pin out) • 128K x 8 or 64K x 16 organization(MX27C1100, ROM pin out compatible) • +12.5V programming voltage • Fast access time: 55/70/85/100/120/150 ns

27C4100

Abstract: 27c4096 27C4096 eprom ups vh 2000 MX27C4096 MX27C4100 MX27C4096Q
Contextual Info: MX27C4100/27C4096 4M-BIT [512K x 8/256K x 16] CMOS EPROM FEATURES • 256K x 16 organization MX27C4096, JEDEC pin • • • • • • • • out 512K x 8 or 256K x 16 organization(MX27C4100, ROM pin out compatible) +12.5V programming voltage Fast access time: 100/120/150 ns