QTC CRYSTAL Search Results

PL611S-17-XXXGC

Contextual Info: 1.8V to 3.3V PicoPLL TM kHz to MHz Programmable Clock FEATURES DESCRIPTION • The PL611s-17 is a low-cost general purpose frequency synthesizer and a member of PhaseLink’s PicoPLL TM Factory Programmable ‘Quick Turn Clock QTC ’ family. Designed to fit in a small SOT23,

Contextual Info: QTC SignalPro Series Signal Conditioning and Expansion Modules for DAQ Series Cards From MADE IN USA 695 $ Basic Single Card Enclosure QTE-7 Seven Module Rack Mount Enclosure Shown with 5 Input Modules Installed ߜ Portable and Rack Mount Configurations ߜ Compatible with DAQ-1200

Contextual Info: PL611-31-xxx Programmable Quick Turn Clock Revision 2.0 General Description The PL611-31-xxx is a low-cost, general purpose frequency synthesizer and a member of Micrel’s factoryprogrammable Quick Turn Clock QTC family. The PL611-31-xxx product family can generate any output

PL611S-17-XXXUC

Contextual Info: 1.8V-3.3V PicoPLL TM kHz to MHz Programmable Clock FEATURES DESCRIPTION • The PL611s-17 is a low-cost general purpose frequency synthesizer and a member of PhaseLink’s PicoPLL TM Factory Programmable ‘Quick Turn Clock QTC ’ family. Designed to fit in a small SOT23,

MOC7811 optocoupler

Abstract: MOC7811 QTC 4N35 working of MOC7811 QTC 4N25 OMRON 1230 opto moc7811 speed sensor NEC PS2001B MOC7811 PIN DETAILS MOC7811 pin diagram with smoke detector
Contextual Info: Optocouplers Data Book 1996 Contents General Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Selector Guide – Alphanumeric Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PL611-01

Abstract: Programmable Clocks sot23 footprint PL611-05 PL611-07 PL611-20 PL611-30 Frequency Multipliers qtc crystal VCXO QTC
Contextual Info: Press Release January 28, 2005 PhaseLink Corporation Announces the Highest Performance, Smallest Footprint Programmable Clocks with Pb lead -Free Packaging Fremont, California. – January 28, 2005 - PhaseLink Corporation, a leader in frequency source generation and the inventor of the Analog Frequency MultipilerTM, today announced

PL611-30

Abstract: p611
Contextual Info: PL611-30 Programmable Quick Turn Clock T M FEATURES PAD CONFIGURATION • Advanced programmable PLL design  Very low Jitter and Phase Noise < 40ps Pk-Pk typ.  Supports complementary LVCMOS outputs to drive LVPECL and LVDS inputs.  Output Frequencies:

PL611-05

Contextual Info: PL611-05 Programmable Quick Turn Clock T M FEATURES PIN CONFIGURATION Advanced programmable PLL design Very low Jitter and Phase Noise 30-70ps Pk-Pk typical Up to 2 programmable outputs Output frequency up to 35MHz CMOS. Accepts Crystal clock input o Fundamental crystal: 10MHz-30MHz

PL611-31

Abstract: p611 31-XXX
Contextual Info: Programmable Quick Turn Clock T M FEATURES •          PIN CONFIGURATION Advanced programmable PLL design Very low Jitter and Phase Noise < 40ps Pk-Pk typical Up to 3 outputs Output frequency up to 200MHz CMOS. o Provides complementary LVCMOS outputs to

CRYSTAL 27MHZ

Abstract: 27mhz P601-26SC PLL601-26 PLL601-26SC PLL601-26SCL PLL601-26SCL-R PLL601-26SC-R
Contextual Info: Preliminary PLL601-26 Audio Clock Generator FEATURES DESCRIPTION The PLL601-26 is a low cost integrated XO IC designed to work with a fundamental 27MHz crystal or a clock input. In addition to a 27MHz clock reference output, it provides two selectable audio

P611-30

Contextual Info: PL611-30 Programmable Quick Turn Clock FEATURES PIN CONFIGURATION XIN, FIN 1 GND 2 CLK0 3 CLK1 4 PL611-30 • Advanced programmable PLL design • Very low Jitter and Phase Noise < 40ps Pk-Pk typ. • Supports complementary LVCMOS outputs to drive LVPECL and LVDS inputs.

PL611-30

Contextual Info: Preliminary PL611-30 Programmable Quick Turn Clock T M PIN CONFIGURATION FEATURES • • • • • • Advanced programmable PLL design Very low Jitter and Phase Noise < 40ps Pk-Pk typical Output frequency up to 375MHz CMOS. Supports differential CMOS output to produce PECL,

PL611-30

Abstract: P611-30
Contextual Info: Preliminary Programmable Quick Turn Clock T M FEATURES PIN CONFIGURATION • Advanced programmable PLL design  Very low Jitter and Phase Noise < 40ps Pk-Pk typ.  Supports complementary LVCMOS outputs to drive LVPECL and LVDS inputs.  Output Frequencies:

Contextual Info: Programmable Quick Turn Clock T M FEATURES PIN CONFIGURATION • Advanced programmable PLL design  Very low Jitter and Phase Noise < 40ps Pk-Pk typ.  Supports complementary LVCMOS outputs to drive LVPECL and LVDS inputs.  Output Frequencies: o < 400MHz at 3.3V

PL611-12

Abstract: phaselink PL611
Contextual Info: Programmable Quick Turn Clock T M FEATURES •         PIN CONFIGURATION Advanced programmable PLL design Very low Jitter 30 to 70ps Pk-Pk typical Output frequency up to 200MHz CMOS Input frequency: o Fundamental crystal – 10MHz to 30MHz

PL611-01

Abstract: PL611-01-XXXMC PL611-01-XXXSC dd marking
Contextual Info: Programmable Quick Turn Clock T M FEATURES •          PIN CONFIGURATION Advanced programmable PLL design Very low Jitter and Phase Noise 30-70ps Pk-Pk typical Up to 3 programmable outputs Output frequency up to 200MHz CMOS. Accepts Crystal or reference clock inputs

PL611-07

Contextual Info: PL611-07 Programmable Quick Turn Clock T M FEATURES PIN CONFIGURATION Advanced programmable PLL design Very low Jitter and Phase Noise 30-70ps Pk-Pk typical Up to 2 programmable outputs Output frequency up to 75MHz CMOS Programmable Output Enable (OE) pin

XTAL 50MHZ

Abstract: PL611-25 RS-30 24V
Contextual Info: PL611-25 Programmable Quick Turn Clock T M FEATURES PAD LAYOUT AND DIE ID • • • • • Advanced programmable PLL design Very low Jitter and Phase Noise < 40ps Pk-Pk typical Two registers banks for 2-time programming. Output frequency up to 200MHz CMOS.

PL611S-03

Abstract: XTAL 50MHZ
Contextual Info: Preliminary PL611s-02/03 1.8V-3.3V PicoPLL TM Programmable Quick Turn Clock T M FEATURES PAD CONFIGURATION & DIE SPEC. 0.85mm (850µmx750µm) Advanced One Time Programmable PLL design. XIN XOUT Programmable PLL or Direct Oscillation operation. OE, FSEL,

ABPX1130-XXXSC

Abstract: ABPX1130-XXXMC ABPX1130-XXXSC-T APBX1130-XXX abracon programming
Contextual Info: Preliminary ABPX1130 Advanced Programmable Clock FEATURES • • • • • • Advanced programmable PLL design Very low Jitter and Phase Noise < 40ps Pk-Pk typical Output frequency up to 375MHz CMOS. Supports differential CMOS output to produce PECL, LVDS XIN/FIN

PL611-01

Abstract: marking code PDB PL611-01-XXXMC PL611-01-XXXSC
Contextual Info: PL611-01 Programmable Quick Turn Clock T M FEATURES • • XIN/FIN 1 GND 2 CLK0 3 CLK1 4 8 XOUT 7 CLK2,OE,PDB,FSEL 6 NC 5 VDD SOP-8 MSOP-8 CLK1 1 GND 2 XIN/FIN 3 PL611-01 • • • Advanced programmable PLL design Very low Jitter and Phase Noise 30-70ps Pk-Pk typical

SC70-6L

Contextual Info: Preliminary PL611s-16 1.8V-3.3V PicoPLL TM 32K Programmable Clock FEATURES DESCRIPTION • Designed for Very Low-Power applications o <1.2mA @ 27MHz o < 5µA when PDB is activated • Input Frequency: 10KHz – 200MHz • OTP selectable AC/DC Ref. Coupling.

SC70-6L

Contextual Info: Preliminary PL611s-15 1.8V-3.3V PicoPLL TM 32K Programmable Clock FEATURES DESCRIPTION • Advanced Programmable PLL design for lowfrequency (KHz) input applications. • OTP selectable AC/DC Ref. Coupling. • Accepts <1.0V reference signal input voltage

mtc 110 16

Abstract: QTC MCT2 MTC1
Contextual Info: Preliminary 1.8V-3.3V PicoPLL TM Programmable Quick Turn Clock T M •       Advanced One Time Programmable PLL design. Programmable PLL or Direct Oscillation operation. Very low Jitter (30-70ps Pk-Pk typical) Output Frequency range o <110MHz @ 1.8V operation