RDCO Search Results

RP60B

Abstract: HC49/ATS RP24C RP47D 7805 ck RP-44C RP52A datasheet of LF33 STMicroelectronics datasheet LF33 sw-dip8
Contextual Info: 8 7 6 5 4 3 2 1 RDCONSUMER STPC CONSUMER REFERENCE DESIGN D D REV 1.2 SAA00023AAXX DECEMBER 31th, 1999 BOARD DESCRIPTION: C FILE NAME RDCONSUMER.SCH - STPC interfaces: SHEET_02.SCH COVER STPC CONSUMER SHEET_03.SCH DRAM 0, 1, 2, 3 SHEET_04.SCH VIDEO INPUT PORT, VGA

ND R315

Abstract: schematic atx 2.03 P4 fdc37b782 5K58 4AC125 RTCO ac9 AD9142 C226 7805 DER-20 RP5A
Contextual Info: 1 2 3 4 5 6 RDCONSUMER-S D D Reference design based on STPC CONSUMER-S 1.1 SAA00029AAXX JULY 21, 2000 C C BOARD DESCRIPTION: FILE NAME - Motherboard in ATX format. - STPC interfaces : * Standard Super-VGA monitor output * 3 PCI slots * 3 ISA slots - Super I/O interfaces :

Contextual Info: 3 THIS DR A WI N G C IS UNPUBL IS HE D. COPYRI GHT RELEASED BY AMP 19 F OR P U B L I C A T I O N ALL INCORPORATED. RIGHTS ,19 REVISIONS R ES ERVED. DF DESCRIPTION RELEASED PER DWN 0H14-0479-04 A PV D FB 7-15-04 D D -W oY SLEEVE 1. FOR L S E 2. SDD 3. . 5 0 0 [ 1 2 . 7 0 ] MI N DDNGTH OF S T R A I G H T

Contextual Info: DAC161S055 Precision 16-Bit, Buffered Voltage-Output DAC General Description Key Specifications The DAC161S055 is a precision 16-bit, buffered voltage output Digital-to-Analog Converter DAC that operates from a 2.7V to 5.25V supply with a separate I/O supply pin that operates down to 1.7V. The on-chip precision output buffer

Contextual Info: THS12082 12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS SLAS271B – MAY 2000 – REVISED DECEMBER 2002 DA PACKAGE TOP VIEW features D D D D D D D D D D D Simultaneous Sampling of 2 Single-Ended Signals or 1 Differential Signal Integrated 16 Word FIFO

Contextual Info: THS1206 12-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS SLAS217A – MAY 1999 – REVISED DECEMBER 1999 features applications D D D D D D D D D D D D D D D D D D D D High-Speed 6 MSPS ADC 4 Single-Ended or 2 Differential Inputs Simultaneous Sampling of 4 Single-Ended

Contextual Info: KL24 Sub-Family Reference Manual Supports: MKL24Z32VFM4, MKL24Z64VFM4, MKL24Z32VFT4, MKL24Z64VFT4, MKL24Z32VLH4, MKL24Z64VLH4, MKL24Z32VLK4, and MKL24Z64VLK4 Document Number: KL24P80M48SF0RM Rev. 3, September 2012 KL24 Sub-Family Reference Manual, Rev. 3, September 2012

Contextual Info: NOV 3 t Î99I ! Preliminary Advanced Micro Devices Am2075 ISDN Digital Exchange Controller IDEC DISTINCTIVE CHARACTERISTICS • Four independent HDLC channels ■ 64-byte FIFO storage per channel and Programmable time slots and channel data rates (up to 4 Mb/s)

LC1 D33

Contextual Info: a Prelim inary Advanced Micro Devices A m 2110 ISDN Terminal Adapter Circuit ITAC DISTINCTIVE CHARACTERISTICS • Universal adapter for ISDN R reference point ■ ■ Support of async and sync Interfaces: X.21, X.21 bis, V.24, RS232C Automatic calling/answering with on-chip

variable time delay circuit using 8085

Abstract: STC 80C51
Contextual Info: H Preliminary Advanced Micro Devices Am2085 ISDN Subscriber Access Controller ISAC-S DISTINCTIVE CHARACTERISTICS • S-Bus transceiver according to CCITT 1.430 ■ Recovery of clock and frame ■ Frame alignment for trunk line termination ■ Access to Echo bit

Contextual Info: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics DS181 v1.6 April 17, 2013 Product Specification Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V

Contextual Info: Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics DS183 v1.18 November 26, 2013 Product Specification Introduction Virtex -7 T and XT FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance.

Contextual Info: K22 Sub-Family Reference Manual Supports: MK22FX512VLK12, MK22FN1M0VLK12 Document Number: K22P80M120SF5RM Rev. 2, May 2013 K22 Sub-Family Reference Manual, Rev. 2, May 2013 2 Freescale Semiconductor, Inc. Contents Section number Title Page Chapter 1 About This Document

XQ5VLX110

Abstract: XQ5VLX330T SX95T DS714 XQ5VFX130T ROCKETIO VIRTEX-5 LX110 UG190 UG191 UG195
Contextual Info: 74 Virtex-5Q FPGA Data Sheet: DC and Switching Characteristics DS714 v2.0 December 17, 2009 Product Specification Virtex-5Q FPGA Electrical Characteristics Virtex -5Q FPGAs are available in -2 and -1 speed grades, with -2 having the highest performance. Virtex-5Q FPGA

UG366

Abstract: LX760
Contextual Info: Virtex-6 FPGA Data Sheet: DC and Switching Characteristics DS152 v3.5 May 17, 2013 Product Specification Virtex-6 FPGA Electrical Characteristics Virtex -6 FPGAs are available in -3, -2, -1, and -1L speed grades, with -3 having the highest performance. Virtex-6 FPGA

S3210

Abstract: RDD15 WDB16
Contextual Info: 30E D VS3210 VI TE SS E S E M I C O N D U C T O R • 1502331 G0P0355 VS3210 b *VTS T - V lr O f 'O f ECL Compatible, 64 x 18, Five-Port Register File Features • Superior performance, high speed/low power: - 8 ns maximum clocked Read/Write cycle time - Maximum power dissipation: 5.5 W

Contextual Info: ERICSSON ^ September 1989 PBL 3736 Subscriber Line Interface Circuit Description The PBL 3736 Subscriber Line Interface Circuit SLIC is a bipolar integrated circuit in 75V technology, which performs the telephone line interface function. The programmable battery feed circuit incorporates a switching regulator to minimize

LD113

Contextual Info: Advance Data Sheet October 1998 microelectronics group Lucent Technologies Bell Labs Innovations Ambassador T8100A, T8102, and T8105 H.100/H.110 Interfaces and Time-Slot Interchangers 1 Product Overview • Two independently programmable groups of up to

siemens b 58 468 la intel 80

Abstract: PEB 2261 ic 8279 rabbit 5000 ELIC - PEF 20550 PCR 406 J RDD 17-33 TSN2 SICOFI PEB 2261 N V2.0 PEF 2261 N
Contextual Info: ICs for Communications Extended Line Card Interface Controller ELIC PEB 20550 PEF 20550 Versions 1.3 User’s Manual 01.96 T2055-0V13-M1-7600 Edition 01.96 This edition was realized using the software system FrameMaker. Published by Siemens AG, Bereich Halbleiter, MarketingKommunikation, Balanstraße 73,

Hyperstone

Abstract: ding dong GMS30C2116 GMS30C2132 GMS30C2216 GMS30C2232 d1135
Contextual Info: Jun. 29, 2001 Ver. 3.1 16/32 BIT RISC/DSP GMS30C2216 GMS30C2232 USER’S MANUAL Revision 3.1 Published by IDA Team in Hynix Semiconductor Inc. ¨ ÏHynix Semiconductor 2001. All Right Reserved. Hynix Offices in Korea or Distributors and Representatives listed at address directory may

EPM9560RC304-15

Abstract: EPM7064SLC44-10 vhdl code for ARQ EASY 21653 EPC1 price epc1213 EPM5064 EPM7032S through hole chip carriers Lexra PLMQ7192/256-160NC
Contextual Info: Newsletter for Altera Customers ◆ Fourth Quarter ◆ November 1998 Quartus: Altera’s Fourth-Generation Development Tool With Altera’s new QuartusTM software, programmable logic development tools enter the multi-million-gate era. This powerful fourthgeneration software meets

sim 300 gsm module VR 0511

Abstract: nf schaltungen PEB 3164 pdsp 2113 halbleiter datenbuch star delta timer siemens siemens cpu 216-2 Siemens Optoelectronic ITT Semiconductors siemens fl 232 v7
Contextual Info: SIEMENS ICs for Communications DSP Oriented PBX Controller DOC PEB 20560 Version 2.1 Contents Overview Functional Block Description Operational Description DSP Core OAK Description of Registers Applications Electrical Characteristics Ordering Information and Mechanical Data

Broken Conductor Detection for Overhead Line Distribution System

Abstract: verilog code for CORDIC to generate sine wave verilog code for cordic algorithm for wireless la TXC 13.56 sma diode h5c intel 945 motherboard schematic diagram 2005Z fet k241 EARTH LEAKAGE RELAY diagram schematic diagram for panasonic inverter air cond
Contextual Info: Stratix GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com SGX5V1-1.2 Copyright 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

cd 1619 CP

Abstract: RX SOP 1738 bc 494 b f.m transmitter Schematics AL 1450 DV hp 2212 sdc 2025 AL 2450 dv circuit diagram toggle switches 2041 BY TRANSISTOR BC 187 vhdl code for 16 prbs generator
Contextual Info: Stratix II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V1-4.2 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and