REDUNDANT DATA TRANSMISSION Search Results
REDUNDANT DATA TRANSMISSION Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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NFMJMPC226R0G3D | Murata Manufacturing Co Ltd | Data Line Filter, |
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NFM15PC755R0G3D | Murata Manufacturing Co Ltd | Feed Through Capacitor, |
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NFM15PC435R0G3D | Murata Manufacturing Co Ltd | Feed Through Capacitor, |
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NFM15PC915R0G3D | Murata Manufacturing Co Ltd | Feed Through Capacitor, |
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SN65HVD267D |
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''Turbo'' CAN Transceiver for CAN FD (Flexible Data Rate) with Redundancy 8-SOIC -40 to 125 |
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REDUNDANT DATA TRANSMISSION Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: Accessories Fiber-optic receiver LWL EHR Features – Receiver for up to two iber-optic signals for the redundant LWL emitter – Reconversion of optical signals into electrical signals and generation of status signals – Highest reliability by redundant data transmission |
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RS422) | |
top mark QA1Contextual Info: Freescale Semiconductor Technical Data Quad InputInput Redundant IDCS Clock Quad Redundant IDCS Clock Generator Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for |
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MPC9894 199707558G top mark QA1 | |
CRC-16 ccitt
Abstract: "cyclic redundancy check" data transmission XOR16 CRC-12 CRC-16 redundant transmission
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16-bit 32-bit CRC-16 ccitt "cyclic redundancy check" data transmission XOR16 CRC-12 CRC-16 redundant transmission | |
i2c qaContextual Info: Freescale Semiconductor Technical Data Quad Input Redundant IDCS Clock Quad Input Redundant IDCS Clock Generator Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for |
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MPC9894 MPC9894 199707558G i2c qa | |
HXSRD01
Abstract: 10Gb trivor smd transistor M21 Lanes PRBS31 w21 transistor smd 8B10B S150 honeywell material spec microcircuit w18 smd transistor
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HXSRD01 1875Gb/s 10Gb/s 1X106 1x10-12 2x10-12 1x1014 1x1010 1x1012 10Gb trivor smd transistor M21 Lanes PRBS31 w21 transistor smd 8B10B S150 honeywell material spec microcircuit w18 smd transistor | |
XOR16
Abstract: CRC-16 ccitt CRC-12 CRC-16 redundant transmission
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16-bit 32-bit XOR16 CRC-16 ccitt CRC-12 CRC-16 redundant transmission | |
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four |
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MPC9894/D MPC9894 | |
1553B
Abstract: MARCONI
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1553B MIL-STD-1553B MARCONI | |
Contextual Info: Freescale Semiconductor, Inc. TECHNICAL DATA Preliminary Information Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four LVPECL |
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MPC9894 | |
GR-1244-CORE
Abstract: GR-253-CORE ZL30105 ZL30105QDG ZL30105QDG1 ZL30106
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ZL30105 ZL30105QDG ZL30105QDG1 GR-1244-CORE GR-253-CORE ZL30105 ZL30105QDG ZL30105QDG1 ZL30106 | |
zl30105qContextual Info: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTCA and H.110 Data Sheet Features • August 2005 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock Ordering Information |
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ZL30105 GR-1244-CORE zl30105q | |
Contextual Info: Freescale Semiconductor Technical Data Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four LVPECL |
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MPC9894 | |
AN1545
Abstract: M24C01 MPC9894
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MPC9894 AN1545 M24C01 | |
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four |
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MPC9894/D MPC9894 | |
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GR-1244-CORE
Abstract: GR-253-CORE ZL30105 ZL30105QDG ZL30105QDG1 ZL30106
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ZL30105 ZL30105QDG ZL30105QDG1 GR-1244-CORE GR-253-CORE ZL30105 ZL30105QDG ZL30105QDG1 ZL30106 | |
63M125Contextual Info: UT1553B RTI Remote Terminal Interface F eatures □ Complete M IL-STD -1553B Remote Terminal interface compliance □ M il-STD -1773 compatible □ Remote certified operation is ASD/ENASC-certified SEAFAC G D Supports dual-redundant data bus Implements all dual-redundant remote terminal mode |
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UT1553B -1553B 84-pin XLN-589 MIL-M-38510. 36-Lead Packaging-10 63M125 | |
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Preliminary Information Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four LVPECL |
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MPC9894/D MPC9894 | |
BUS-65132
Abstract: IL-STD-1553 MIL-STD-1553B
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BUS-65134 MIL-STD-1553 BUS-65132 BUS-65134 MILSTD-1553B MILSTD-1553 S-65132 BUS-65132 IL-STD-1553 MIL-STD-1553B | |
abdcContextual Info: Q0Q ILC DATA DEVICE CORPORATION*— BUS-65112 AND BUS-65117 MIL-STD-1553 DUAL REDUNDANT REMOTE TERMINAL HYBRID FEATURES • SMALL SIZE & LOW POWER • COMPLETE RTU PROTOCOL BUS-65112 DDIP BUS-65117 FLATPACK DESCRIPTION The BUS-65112 is a com plete dual redundant MIL-STD-1553 Remote |
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BUS-65112 BUS-65117 MIL-STD-1553 BUS-65117 12MHzlN abdc | |
ZL30105QDG1
Abstract: GR-1244-CORE GR-253-CORE ZL30105 ZL30105QDG ZL30106
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ZL30105 GR-1244-CORE ZL30105QDG1 GR-253-CORE ZL30105 ZL30105QDG ZL30106 | |
GR-1244-CORE
Abstract: GR-253-CORE MT90866 ZL30105 ZL30105QDG ZL30106 tc84l
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ZL30105 GR-1244-CORE ZL30105QDG GR-253-CORE MT90866 ZL30105 ZL30105QDG ZL30106 tc84l | |
HM 338Contextual Info: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 Data Sheet Features June 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock • Supports ITU-T G.813 option 1, G.823 for 2048 kbs |
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ZL30105 GR-1244-CORE HM 338 | |
BUS-65127
Abstract: BUS-65125 BUS65125B
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BUS-65125 MIL-STD-1553 BUS-65127 BUS-65125 MILSTD-1553 MIL-STD-1553B BUS-65125-B BUS-65127 BUS65125B | |
BUS-65127
Abstract: BUS-65125 BUS65127 BUS65125 MILSTD-1553
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BUS-65127 MIL-STD-1553 BUS-65125 BUS-65127 MILSTD-1553B MILSTD-1553 and65127 BUS-65125 BUS65127 BUS65125 |