RNEG4 Search Results

rneg2

Contextual Info: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103C DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 gapped clock • Monitor function for frame pulse, clock and data

Contextual Info:  XRT81L27 PRELIMINARY SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY OCTOBER 2000 REV. P1.0.1 GENERAL DESCRIPTION The XRT81L27 is an optimized seven-channel, analog, 3.3V, line interface unit, fabricated using low power CMOS technology. The device contains seven

dmo 365 r

Abstract: dmo 365 XRT83VSH316IB-F
Contextual Info: XRT83VSH316 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT OCTOBER 2007 REV. 1.0.0 GENERAL DESCRIPTION for external timing 8kHz, 1.544Mhz, 2.048Mhz, nxT1/J1, nxE1 . The XRT83VSH316 is a fully integrated 16-channel short-haul line interface unit (LIU) that operates from

RSIG11

Contextual Info: DALLAS SEMICONDUCTOR Four x Four 16 Channel T1/E1 Framer Fourx Three 12 Channel T1/E1 Framer Preliminary DS21FF42/DS21FF44 DS21FT42/DS21FT44 FEATURES • Sixteen 16 or Twelve (12) Completely Independent T1 or E1 Framers in O ne Small 27mm x 27mm Package

M28335-13P

Abstract: M28335 ferrite RM6 CX28365 M28335EBGC TBR24 DIMENSIONAL STANDARD AH31 AK20 ferrite e16 ferrite transformer ch9i
Contextual Info: Preliminary Information This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. M28335 Twelve Port T3/E3/STS-1 Line Interface Unit The M28335 is a 12-channel, T3/E3/STS-1 Line Interface Unit LIU . It is configured via a

Contextual Info: DATA S H E E T JULY 1999 Revision 1.1 LXT384 Octal T1/E1 Transceiver General Description The LXT384 is an octal short haul Pulse Code Modulation PCM transceiver for use in both 1.544 Mbps (Tl) and 2.048 Mbps (El) applications. It incorporates eight independent receivers and eight independent transmitters

68-bga

Abstract: C4 to BGA 144L CDB61881 CS61881 CS61881-IB CS61881-IQ scr 106 C
Contextual Info: CS61881 Octal E1 Analog Front End Features Description • Octal E1 Line Interface Unit Compliant with G.703 The CS61881contains eight analog front ends that each provide the line interface for E1 transmission systems. The device contains eight receivers and transmitters

PRM 231 e1

Abstract: TR-TSY-499 SAS controller chip H100 IXF3208 LXT3008 LXT3108 LXT384 SLC96 G964
Contextual Info: IXF3208 Octal T1/E1/J1 Framer with On-Chip PRM Advance Information Datasheet The Intel IXF3208 with On Chip PRM is an octal framer for T1/E1/J1 and ISDN primary rate interfaces operating at 1.544 Mbps or 2.048 Mbps. Each framer consists of a receive and

Contextual Info: DS21448 3.3V E1/T1/J1 Quad Line Interface www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS21448 is a quad-port E1 or T1 line interface unit LIU for short-haul and long-haul applications. It incorporates four independent transmitters and four independent receivers in a single 144-pin PBGA or

XRT83SL314

Abstract: XRT83SL314IB
Contextual Info: PRELIMINARY XRT83SL314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT NOVEMBER 2003 REV. P1.0.5 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection,

TS6 v14

Abstract: F2HD RDC23
Contextual Info: DS21FT40 Four x Three 12 Channel E1 Framer www.dalsemi.com MULTI-CHIP MODULE FEATURES • • • • • FUNCTIONAL DIAGRAM Twelve 12 completely independent E1 Framers in one small 27 mm x 27 mm Package Each Multi-Chip Module (MCM) Contains Three DS21Q44 Quad E1 Framer Die

Contextual Info: DS21448 3.3V E1/T1/J1 Quad Line Interface www.maxim-ic.com GENERAL DESCRIPTION The DS21448 is a quad-port E1 or T1 line interface unit LIU for short-haul and long-haul applications. It incorporates four independent transmitters and four independent receivers in a single 144-pin PBGA or

TXN612

Abstract: MT 8222 t1e8 AMI 8531
Contextual Info: + DS32506/DS32508/DS32512 6-/8-/12-Port DS3/E3/STS-1 LIU www.maxim-ic.com FEATURES GENERAL DESCRIPTION Pin-Compatible Family of Products Each Port Independently Configurable Receive Clock and Data Recovery for Up to 457 meters 1500 feet of 75Ω Coaxial Cable

LXT384BE

Abstract: LXT384 lxt384le SXT6234 LXT384BE B1 10BQ060 11DQ04 MBR0540T1
Contextual Info: LXT384 Octal T1/E1/J1 Line Interface Unit Datasheet The LXT384 is an octal short haul Pulse Code Modulation PCM Line Interface Unit for use in both 1.544 Mbps (T1) and 2.048 Mbps (E1) applications. It incorporates eight independent receivers and eight independent transmitters in a single 144 pin LQFP or 160 ball PBGA

LQFP-144 recommended layout

Abstract: LXT381LE 10BQ060 11DQ04 LQFP-144 LXT381 LXT381BE LXT386 MBR0540T1
Contextual Info: LXT381 Octal E1 Line Interface Unit Datasheet General Description The LXT381 is an octal short haul analog Line Interface Unit for ITU G.703 2.048 Mbit/sec. transmission systems. It incorporates eight independent receivers and eight independent transmitters in a single LQFP-144 or PBGA-160 package.

Contextual Info: tmän S w it c h „ DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B x- DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating V T1.5 Byte Synchronous mapping for

Contextual Info: DS26334 3.3V, 16-Channel, E1/T1/J1 Shortand Long-Haul Line Interface Unit www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26334 is a 16-channel short/long-haul line interface unit LIU that supports E1/T1/J1 from a single 3.3V power supply. A single bill of material can

LSE B10 transformer

Contextual Info: DATA SH EET FEBRUARY 1999 Revision 1.0 LXT380 Octal E1 G.703 Transceiver General Description The LXT380 is an octal short haul PCM transceiver for ITU G.703 2.048 Mbit/sec. transmission systems. It incorporates eight independent receivers and eight independent transmitters in a sin­

Contextual Info: DATA SHEET SEPTEMBER 1998 LXT336 Revision 1.1 Quad T1/E1 Receiver General Description The LXT336 quad receiver is a fully-integrated, quadruplePCM receiver for both T1 1.544 Mbps and E l (2.048 Mbps) applications. It incorporates four independent receivers in a single 64-pin QFP package.

I8051

Abstract: 74LS221 pin configuration of 74ls32 HEADER 10X2 74LS32 pin configuration JTAG header 10x2 Connector 74ls32 datasheet b14 mot JTAG header 10x2 datasheet Connector 74LS240
Contextual Info: LXD380 — Evaluation Board for Octal E1 Applications Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LXD380 — Evaluation Board for Octal E1 Applications User Guide. Order Number: 249212-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

TG29

Abstract: TG29-1205 ps4 schematic ps3 schematic AN068 LXT360 LXT360QE TG29-1205NX TXC-031043
Contextual Info: Universal Four-Port Network Interface T1/E1 Long-Haul/ShortHaul Design Kit Application Note January 2001 Order Number: 249169-001 As of January 15, 2001, this document replaces the Level One document known as AN068. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

Contextual Info: DEMO KIT AVAILABLE 19-5753; Rev 3/11 DS26334 3.3V, 16-Channel, E1/T1/J1 Short- and Long-Haul Line Interface Unit GENERAL DESCRIPTION FEATURES The DS26334 is a 16-channel short/long-haul line interface unit LIU that supports E1/T1/J1 from a single 3.3V power supply. A single bill of material can

BS5450

Abstract: PE Relay LXT380 LXT381 TG29 TG48 TG49 bell S553 SIGNAL PATH designer what is B8ZS and how does it work
Contextual Info: LXT380/1 Frequently Asked Questions January 2001 Order Number: 249181-001 As of January 15, 2001, this document replaces the Level One document known as LXT380/LXT381FAQs. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

T3D 43 diode

Abstract: T3D 53 diode T2D 78 T3D 67 diode t3d 62 diode T3D 68 diode T2D 81 diode 78 t2d T2D 83 diode t2d t3d
Contextual Info: 5 4 3 2 1 J15 ttip0 tring0 rtip0 rring0 1 2 3 4 HEADER 4 U1B D D S0 RCLK0 RPOS0 RNEG0 ttip0 C1 1 2 3 4 8 7 6 5 HEADER 4X2 CODES0 RCLK0 RPOS0 RNEG0 W8 W9 Y8 V9 U9 W10 TCLK0 TPOS0 TNEG0 TTIP0 TRING0 RTIP0 RCLK0 RPOS0 RNEG0 RRING0 T1A T10 V10 Y9 0.68uf tring0